PADS - Desktop PCB Design
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 | This peer-to-peer global community provides PADS users and others interested in PADS products and desktop PCB design issues with an open forum in which to discuss flow, methodology, or product issues. The community includes technical experts from the PADS product division who may participate in the discussions. The community also provides unique access to PADS management for business-related questions. Just "Ask the PADS Team!" While you may receive technical product insights in this community, it is not intended for formal product support. For TechNotes, documentation, or downloads, or to submit a Service Request, please continue to use SupportNet. To submit an enhancement request, please use the PADS Ideas site. Please visit this community frequently as content and discussions continually change. We look forward to your active participation! |
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Re: Differential pairs,rescheduling,diff pair drc errors, staggered pin connectors and trying to get these bugs fixed in the router. 5 hours ago in Ask the PADS Team | by robert_davies |
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Re: Castellated/Half-Via Mounting Holes - Design info request 21 hours ago in PADS Layout and Routing | by jduquette |
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Re: idf Import into PADS 22 hours ago in PADS Layout and Routing | by Robert_Yoder |
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Re: 9.4.1 Update 1 day ago in PADS Front-end Design (DxDesigner, PADS Logic) | by davep |
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Re: Please help with 9.4.1 !!! 1 day ago in PADS Layout and Routing | by benny1 |
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