Happy Holden's PCB Insights Blog

Happy Holden's PCB Insights

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Hopefully, you have taken the opportunity to download my free E-book, the HDI HANDBOOK. NOW is your chance to tell me what would make interesting reading for FUTURE chapters in the SECOND EDITION of the HDI Handbook.  Here are some brief descriptions of what I am planning to add now.  But this book isn't for me - it's for ALL of you!  So provide me with some advice and if you know the perfect expert that could write that chapter, throw that in as well.  I thank you all now for helping me.  The Second Edition will be available for download on Jan. 3, 2010.

 

1. Automatic Chemical Process Monitoring and Control - High-speed PCB and FPC manufacturing with increasing density requires better chemical control of processes.  This chapter will describe traditional instrumental and some not-so-standard methods of automatic chemical analysis and control.  The PCB processes, individual anion and cations and other indicators are highlighted for control.

  

2. Process Automation Strategies and Equipment - Complementing high-speed manufacturing is high-speed automated equipment.  This is the first time that 10 different types of automated PCB equipemnt has been described and features.  Conveyorized: horizontal, vertical, overhead and hybrid;  Process Tanks: walking beam, cable, split-rail pusher and side-arm return-type;  Programmed Hoists: cantelevered and gantry.  Control systems, programming hoists, simplified control theory and automation strategies are also described.


3. Design Methodologies for Creating Proper Split Power Planes  - Plane design methodology to eliminate noise problems.  How you need to change the design perspective of PDNs.  The PCB design setup for: Connecting to the plane, plane shapes, Do's and Don'ts to be considered, plane "Routing" strategies for fanout power vias.  Evaluating plane integrity, consideration of decoupling capacitors and buried capacitance.  Power Supply checklist, new IPC standards for current carrying and deficiencies in CAD tools today.

4. Impedance, Stackups and Crosstalk - A complete look at signal tracts to transfer signal power from one device to another by consideration of materials, stackups, impedance matching and crosstalk.  The various high-speed models for microstrips and stripline, of differential signalling, with coplanar and waveguide alternatives are explained.  Advanced noise explanation of crostalk are also explained.

5. BGA Breakout Strategies - Charles Pfeil of Mentor has agreed to write a chapter that summarizes his theories and book on " BGA Breakout and Routing-ED II".  His new technique for breakout of large BGAs has revolutionised the wiring of boards.  It was highlighter in Chapter 3, but in only 4 pages- now it will be explained in a lot more detail.

6. Coupons and Techniques for Process Control - Ron Rhodes had a distinguished carreer at Bell Labs and will provide a chapter on the use of PCB coupons to highlight  quality and process capability.  Reliability is another set of coupons and have a different focus.  How to interpret and "what these coupons mean" is another distinguished topics that Ron created by writing a column in CircuiTree magazine from 1994 to 2007.

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I'm sure all of you are aware of the rapid progression of HDI technology used in mobile phones, telecom and advanced consumer products.  But HDI is rapidly being introduced into military and space programs as well.  The HDI for military and space has to be ultra-reliable and capable of harsh environments.  The cost to develop these materials and fabrication processes can be quite high.  So the IPC has teamed up with the U.S. Navy and the NSWC-CRANE  state-of-the-art PCB facility to develop an advanced HDI Hands-On fabrication course this fall (PD-05).

Open to all fabricators, this is a 3-day, hands-on, working course that embraces the latest advanced HDI features required by new military and aerospace programs and employed by advanced telecom systems as well.  The October 13-15 working laboratory event is proceeded by 5 2-hour WebEx classroom instructions on Sept. 14-18, to provide more "hands-on" time in Oct.  The "Hands-on" attendance is limited to only 21 participants, due to the nature that everyone will build HDI boards, so register early at the IPC.  http://www.ipc.org

PD-05: High Density Interconnect

October 13-15, 2009 - Crane, Indiana

This HDI fabrication hands-on workshop provides an essential instructive platform for companies interested in learning the advanced fabrication processes of HDI technology. Attendees will be provided a “hands-on” working laboratory event that features informative technical tutorials and an invaluable “hands-on” workshop, where you will actually build these HDI structures.  You will be provided the instructional HDI technology as it relates to advanced HDI fabrication — as needed by numerous aerospace, military, telecom and computer OEMs with an emphasis on high reliability and endurance. Join us for this enlightening series, and discover what you need to know to implement HDI technology in all of its forms.

What You Will Learn:


Tutorial presentations and hands-on exercises cover these topics :

  • Imaging and etching — achieving fine lines and spaces, controlled copper etch
  • Lamination & Via formation — mechanical and laser drilling & lamination of new materials
  • Metallization & Electrodeposition — desmear, electroless copper, direct metalization and semi-additive processing— improved throwing power copper fill, enhancing through hole and microvia reliability, copper thickness requirements for thermal reliability and process controls
  • Process control coupons, DOE, Reliability and testing—in-process coupons for HDI and reliability coupons
  • HDI Exercises at NSWC-Crane Laboratory
  • Fine line Direct Imaging/etching- 25 um traces/25 um spaces (~1 mil lines/spaces) using new sacrificial super-foil “DFF”
  • Lamination of new thin Laser Drillable Prepreg, like 1086LD or 1067LD for power integrity and impedance control
  • Copper “Super-fill” plating to plate up microvias from 75~150 um in diameter
  • Drilled via filling with epoxy to plug buried vias
  • Etching & laser drilling ceramic BC materials for buried capacitors and distributed capacitance
  • HDI process control coupons to monitor the HDI fab process
  • IST coupons to test the reliability of the finished HDI board.

High Density Interconnect Webcast Series

September 14-18, 2009

(10:00 am – 12:00 am Central Daylight Savings Time)

This series of five two (2)-hour webcasts will address key technologies for fabricators who want to get into advanced HDI fabrication.

September 14, 2009 - Overview/ Design/ Process Control & Reliability

  • Process control coupons, DOE, Reliability and testing—in-process coupons for HDI and reliability coupons

    • HDI Exercises at NSWC-Crane Laboratory
    • HDI process control coupons to monitor the HDI fab process

               

                  • IST coupons to test the reliability of the finished HDI board

                September 15, 2009 - Fine-line and Via-Formation

                Imaging and etching — achieving fine lines and spaces, controlled copper etch

                • Lamination & Via formation — mechanical and laser drilling & lamination of new materials
                • Fine line Direct Imaging/etching- 25 um traces/25 um spaces (~1 mil lines/spaces) using new sacrificial super-foil “DFF”
                • Semi-additive processing (SAP) using new molecular interface technology to achieve 25 micron traces and spaces
                • Etching & laser drilling ceramic BC materials for buried capacitors and distributed capacitance

                September 16, 2009 - Material Control and Lamination

                • Lamination of new thin Laser Drillable Prepreg, like 1086LD or 1067LD for power integrity and impedance control

                September 17, 2009 - Via-Fill

                • Drilled via filling with epoxy to plug buried vias
                • Copper “Super-fill” plating to plate up microvias from 75~150 um in diameter

                September 18, 2009 - Metallization & Electrodeposition

                  • Metallization & Electrodeposition — desmear, electroless copper, direct metalization and semi-additive processing— improved throwing power copper fill, enhancing through hole and microvia reliability, copper thickness requirements for thermal reliability and process controls

                 

                 

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                Improving your personal performance is a large topic.  But a critical area is high-frequency electrical performance for the board in both signals and plane PDN.  Other new trends are incremental design/validation methodologies and the improved use of constraint-autorouting, as well as re-use of circuits and DfT.  More on this in future BLOGS.

                Here is where I suggest that you start looking for where you can learn these new topics.  First, if you have not downloaded my new HDI HANDBOOK, this is a good place to start.  The 631 page e-Book is FREE, so there is no excuse not to have it.  You can download it from my BLOG at http://communities.mentor.com/mgcx/community/pcb/pcb_blogs/happy_holden .  My Chapter-4 “HDI Electrical Performance” is written by Dr. Eric Bogatin, and Dr. Bogatin has many more resources available for learning.  His past Web Series on “No MYTHS Allowed” can be downloaded from www.gigatest.com/Publications/PubsIndex.jsp This site has 105 documents, lectures and tutorials available from Dr. Bogatin.  Figure 1 shows a typical slide form one of his lectures. Dr. Bogatin’s current Internet Site is http://www.BeTheSignal.com and it also has many free tutorials on it .

                bFig3.jpg

                 

                Another very useful design ‘Toolkit’ is provided by Kenneth Wood, owner of Saturn PCB Design in Deltona, FL.[3]  His Toolkit is shown in Figure 2 and provides software to calculate physical and electrical characteristics of vias and conductors; signal bandwidth and max. lengths; differential-pair impedances; padstack designs; drill/wire gauge conversions; min conductor spacing for voltages; and microstrip/stripline impedances.  This can be downloaded at:  (http://www.saturnpcb.com )

                FIG4.jpg

                 

                Another source of training and learning is to use Google and Yahoo to search the Internet for college classes in signal integrity, EMI Compliance, Design for Manufacturing or high-speed design.  One such search yielded the “EE166: High-Speed PCB Design” course at Harvey Mudd College in Claremont, CA.  HMC has the distinction of being awarded “One of the Top Undergraduate Engineering Schools in the US”.  In this case it was the lecture notes and labs by Prof. Sarah Harris   -(www3.hmc.edu/~sharris/class/e166/)[4].

                The IPC Designers Council and the IEEE are constantly running courses for designers.

                Last, to reduce schedules is one of “Push Left”, “Do it right the first time” and distribute more activities in parallel.  Move critical activities and checks/audits up earlier in the design process.  Find any problems or mistakes early.  IF [errors] found in manufacturing, critical schedules and costs are bound to be impacted.  Now is the time to “learn to use the autorouter correctly” and “how to apply signal and power integrity”!

                 

                Finally, if you are “surplused”, “made redundant”, “sacked”, “displaced”, “sacrificed” or just “let GO”, Mentor has the “Displaced Worker Program”. [5] You may take Mentor classes on a “Space Available” basis, for free, and that includes online courses as well as in-class courses in Austin, Boston (Marlborough, MA), Chicago, Minneapolis, Dallas, Denver (Longmont, CO), Portland (Wilsonville, OR) and San Jose.  Go to http://www.mentor.com/training_and_services/training/dwp to check on availability.

                REFERENCES

                1.      HDI Handbook and other tech papers, tutorials at http://communities.mentor.com/mgcx/community/pcb/pcb_blogs/happy_holden

                2.      Eric Bogatin’s “No MYTHS Allowed” at GigaTest Labs, there is 105 doc. www.gigatest.com/Publications/PubsIndex.jsp & www.bethesignal.com

                3.      Free PCB Tools (www.saturnpcb.com) –vias, conductors, signals, diff pairs, padstacks, min. conductor Spacing & impedance.

                4.      University course lectures (like EE166 High Speed PCB Design by Dr. Sarah Harris of Harvey Mudd College-(www3.hmc.edu/~sharris/class/e166/)

                5.      If ‘out of work’, Mentor has the “Displaced Workers Program” allows you to audit our training for free, go to http://www.mentor.com/training_and_services/training/dwp

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                For everyone using the new HyperLynx PI tool, here is a list of available PCB Laminates that are candidates for the PWR/GND pair in your stackup.  This table is from page 217 (Fig 32) of my HDI HANDBOOK.  IF you have not downloaded this free book, the URL is the 'BLUE BOX" on the 'right' here on my BLOG.  The entire Chapter 5 is about "Materials for HDI" and you might find it interesting.  This table is new and has the properties @ 1GHZ.

                 

                Some of the abbreviation used in the Table are: CCL=copper clad laminate; film=copper clad unreinforced polyimide film; Prepreg=epoxy fiber-glass coated b-stage material for lamination; RCF=resin coated copper foil; Sequential lam=the material requires some processing (one side etched) and lamination before it can be used; Both sides etching=the copper for PWR and GND can be etched and then the material laminated in to the stackup.

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                The HDI Handbook - A comprehensive high-density interconnection resource for designers, fabricators and assemblers

                 

                First Edition, Written by Happy Holden, et al., Edited by Happy Holden and Diane Neer Here is the link to DOWNLOAD the HANDBOOK (53 MB ZIP)

                 

                I have finally finished my book on high density interconnects (HDI). Along with the help of 9 friends and fellow PWB experts, we have created a 631 pages book about HDI.

                 

                FOCUS: This book is not intended to introduce PCB Technology to the reader, that is effectively done by Coomb’s PCB Handbook. It does take up High Density Interconnects (HDI) and microvias in much more detail than where Coomb’s left off.

                 

                The 16 chapters cover:

                 

                Section 1: Introduction

                The widespread use of new electronic components employing Ball-Grid Array (BGA), Chip Scale Packaging (CSP), and other evolving technology form-factors means new fabrication techniques must be used to create printed circuit boards (PCBs) that will accommodate parts with extremely tight lead pitches and small geometries. In addition, extremely fast signal rise-times and signal bandwidths challenge systems designers to find better ways to overcome the negative effects of inductance, noise, radio frequency interference (RFI) and electro-magnetic interference (EMI) have on their product’s performance. The use of PCBs incorporating microvia circuit interconnects is currently one of the most viable solutions on the market. Assemblies can be charted by their characteristics. The interaction of interconnect elements, such as assembly, PC boards, and components, are described by their metrics: assembly density, assembly complexity, component complexity and board density. Happy Holden

                 

                Section 2: The Interconnect Market

                HDI products, size and market growth rates, examples of different HDI products using the three Platforms: 1. Consumer and mobile phones, 2. substrates and 3. large-high performance boards. The “HDI Vintage Chart” with the three ‘basic’ characteristics of HDI architecture. -Karen Carpenter

                 

                Section 3: Design of Advanced Printed Circuits

                As the electronic products industry continues to push the envelope of extreme miniaturization, product developments teams are being forced further into the realm of high density interconnect. Design techniques and substrates labeled exotic only a few short years ago are now considered mainstream. In particular, build-up substrate usage has grown dramatically, and is now found in a large percentage of high production electronic products. This Section is to educate and inform you on the technologies, needs, issues and solutions available today for advanced substrate design. The focus will briefly cover the 4 changes to TH PCB design techniques required for HDI and the IPC Design Standard 2226. -Happy Holden

                 

                Section 4: Electrical Performance

                The good old days of 10 to 16 MHz clock frequencies are gone. It used to be the chief design challenge in circuit boards or packages was routing all the signals in two layers and getting packages that wouldn’t crack during assembly. The electrical properties of the interconnects were not important because they didn’t affect system performance. But the world has changed in the past 10 years. Clock frequencies on chip now are over 3 GHz, and on board, are over 800 MHz. In most systems, as the clock frequency goes up, the rise time always gets shorter. A shorter rise time means signal integrity problems increase dramatically. Signal integrity is broadly concerned with the problems that arise from how the electrical properties of the interconnects affect system performance. -Dr. Eric Bogatin

                 

                SECTION 5: Materials

                Many new materials now support HDI. The material performance and slash-sheets from IPC HDI Material Standard 4104 explain many of these. -John Andresakis

                 

                SECTION 6: The HDI Mfg Processes

                Various HDI mfg processes and structures are explained. These utilize standard PCB processes but with greater miniaturization and higher density. -Happy Holden

                 

                SECTION 7: Small Hole Creation

                The machines, processes, quality concerns and issues with creating small vias. -Michael Carano

                 

                SECTION 8: Metallization

                Desmear & metallization (electroless) ,including the materials and processes for paste in vias. -Michael Carano

                 

                SECTION 9: Fine-Line Imaging and Etching

                Image transfer processes, stripping & etching fine lines, registration, equipment, and materials for fine-line image transfer. -Michael Carano from columns written by Dr. Karl Dietz

                 

                SECTION 10: Plating and Finishes

                Plating, pulse-plating, small-holes plating and filling, final finishes. -Michael Carano

                 

                SECTION 11: Testing

                AOI and electrical testing of HDI -Dr. Christophe Vaucher

                 

                SECTION 12: Quality, Acceptability & Reliability

                Performance of HDI Benchmarking, Vendor readiness, qualification, quality issues, lab techniques and equipment. -Happy Holden

                 

                SECTION 13: Assembly Topics

                Via-in-pad issues, fine-pitch, soldering & voids, in-circuit testing -Matt Wuensch & Mark Laing

                 

                SECTION 14: Embedded Components

                Embedded Resistors, Embedded Capacitors, Distributed capacitance and Embedded Actives, the materials and design tools -Happy Holden

                 

                Section 15: Advanced HDI & Next Generation Technologies

                The use of more complex components with very high I/O counts and increasing speed has pushed the interconnect into the realm of photonics and opto-electronics. The materials, processes and test vehicles for optical waveguides in printed circuits are reviewed. -Happy Holden

                 

                Section 16: HDI Substrates & Packages

                This Section is to educate and inform on the technologies, design issues and solutions available today for advanced IC substrate design. The focus will briefly cover the challenges of wire bonding, flip chip, stacked dies and packages and through-silicon vias that allow various System-in-Packages (SiP) and 3D architectures. -Per Viklund

                 

                 

                 

                 

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