Happy Holden's PCB Insights Blog

New Chapters for the HDI HANDBOOK

happy_holden@mentor.com — Tue, 23 Jun 2009 23:00:24 GMT

Hopefully, you have taken the opportunity to download my free E-book, the HDI HANDBOOK. NOW is your chance to tell me what would make interesting reading for FUTURE chapters in the SECOND EDITION of the HDI Handbook. Here are some brief descriptions of what I am planning to add now. But this book isn't for me - it's for ALL of you! So provide me with some advice and if you know the perfect expert that could write that chapter, throw that in as well. I thank you all now for helping me. The Second Edition will be available for download on Jan. 3, 2010.

1. Automatic Chemical Process Monitoring and Control - High-speed PCB and FPC manufacturing with increasing density requires better chemical control of processes. This chapter will describe traditional instrumental and some not-so-standard methods of automatic chemical analysis and control. The PCB processes, individual anion and cations and other indicators are highlighted for control.

2. Process Automation Strategies and Equipment - Complementing high-speed manufacturing is high-speed automated equipment. This is the first time that 10 different types of automated PCB equipemnt has been described and features. Conveyorized: horizontal, vertical, overhead and hybrid; Process Tanks: walking beam, cable, split-rail pusher and side-arm return-type; Programmed Hoists: cantelevered and gantry. Control systems, programming hoists, simplified control theory and automation strategies are also described.

3. Design Methodologies for Creating Proper Split Power Planes - Plane design methodology to eliminate noise problems. How you need to change the design perspective of PDNs. The PCB design setup for: Connecting to the plane, plane shapes, Do's and Don'ts to be considered, plane "Routing" strategies for fanout power vias. Evaluating plane integrity, consideration of decoupling capacitors and buried capacitance. Power Supply checklist, new IPC standards for current carrying and deficiencies in CAD tools today.

4. Impedance, Stackups and Crosstalk - A complete look at signal tracts to transfer signal power from one device to another by consideration of materials, stackups, impedance matching and crosstalk. The various high-speed models for microstrips and stripline, of differential signalling, with coplanar and waveguide alternatives are explained. Advanced noise explanation of crostalk are also explained.

5. BGA Breakout Strategies - Charles Pfeil of Mentor has agreed to write a chapter that summarizes his theories and book on " BGA Breakout and Routing-ED II". His new technique for breakout of large BGAs has revolutionised the wiring of boards. It was highlighter in Chapter 3, but in only 4 pages- now it will be explained in a lot more detail.

6. Coupons and Techniques for Process Control - Ron Rhodes had a distinguished carreer at Bell Labs and will provide a chapter on the use of PCB coupons to highlight quality and process capability. Reliability is another set of coupons and have a different focus. How to interpret and "what these coupons mean" is another distinguished topics that Ron created by writing a column in CircuiTree magazine from 1994 to 2007.

HDI Training for Fabricators

happy_holden@mentor.com — Wed, 10 Jun 2009 15:25:15 GMT

I'm sure all of you are aware of the rapid progression of HDI technology used in mobile phones, telecom and advanced consumer products. But HDI is rapidly being introduced into military and space programs as well. The HDI for military and space has to be ultra-reliable and capable of harsh environments. The cost to develop these materials and fabrication processes can be quite high. So the IPC has teamed up with the U.S. Navy and the NSWC-CRANE state-of-the-art PCB facility to develop an advanced HDI Hands-On fabrication course this fall (PD-05).

Open to all fabricators, this is a 3-day, hands-on, working course that embraces the latest advanced HDI features required by new military and aerospace programs and employed by advanced telecom systems as well. The October 13-15 working laboratory event is proceeded by 5 2-hour WebEx classroom instructions on Sept. 14-18, to provide more "hands-on" time in Oct. The "Hands-on" attendance is limited to only 21 participants, due to the nature that everyone will build HDI boards, so register early at the IPC. http://www.ipc.org

PD-05: High Density Interconnect

October 13-15, 2009 - Crane, Indiana

This HDI fabrication hands-on workshop provides an essential instructive platform for companies interested in learning the advanced fabrication processes of HDI technology. Attendees will be provided a “hands-on” working laboratory event that features informative technical tutorials and an invaluable “hands-on” workshop, where you will actually build these HDI structures. You will be provided the instructional HDI technology as it relates to advanced HDI fabrication — as needed by numerous aerospace, military, telecom and computer OEMs with an emphasis on high reliability and endurance. Join us for this enlightening series, and discover what you need to know to implement HDI technology in all of its forms.

What You Will Learn:

Tutorial presentations and hands-on exercises cover these topics :

Imaging and etching — achieving fine lines and spaces, controlled copper etch
Lamination & Via formation — mechanical and laser drilling & lamination of new materials
Metallization & Electrodeposition — desmear, electroless copper, direct metalization and semi-additive processing— improved throwing power copper fill, enhancing through hole and microvia reliability, copper thickness requirements for thermal reliability and process controls
Process control coupons, DOE, Reliability and testing—in-process coupons for HDI and reliability coupons
HDI Exercises at NSWC-Crane Laboratory
Fine line Direct Imaging/etching- 25 um traces/25 um spaces (~1 mil lines/spaces) using new sacrificial super-foil “DFF”
Lamination of new thin Laser Drillable Prepreg, like 1086LD or 1067LD for power integrity and impedance control
Copper “Super-fill” plating to plate up microvias from 75~150 um in diameter
Drilled via filling with epoxy to plug buried vias
Etching & laser drilling ceramic BC materials for buried capacitors and distributed capacitance
HDI process control coupons to monitor the HDI fab process
IST coupons to test the reliability of the finished HDI board.

High Density Interconnect Webcast Series

September 14-18, 2009

(10:00 am – 12:00 am Central Daylight Savings Time)

This series of five two (2)-hour webcasts will address key technologies for fabricators who want to get into advanced HDI fabrication.

September 14, 2009 - Overview/ Design/ Process Control & Reliability

Process control coupons, DOE, Reliability and testing—in-process coupons for HDI and reliability coupons

HDI Exercises at NSWC-Crane Laboratory
HDI process control coupons to monitor the HDI fab process

IST coupons to test the reliability of the finished HDI board

September 15, 2009 - Fine-line and Via-Formation

Imaging and etching — achieving fine lines and spaces, controlled copper etch

Lamination & Via formation — mechanical and laser drilling & lamination of new materials
Fine line Direct Imaging/etching- 25 um traces/25 um spaces (~1 mil lines/spaces) using new sacrificial super-foil “DFF”
Semi-additive processing (SAP) using new molecular interface technology to achieve 25 micron traces and spaces
Etching & laser drilling ceramic BC materials for buried capacitors and distributed capacitance

September 16, 2009 - Material Control and Lamination

Lamination of new thin Laser Drillable Prepreg, like 1086LD or 1067LD for power integrity and impedance control

September 17, 2009 - Via-Fill

Drilled via filling with epoxy to plug buried vias
Copper “Super-fill” plating to plate up microvias from 75~150 um in diameter

September 18, 2009 - Metallization & Electrodeposition

Metallization & Electrodeposition — desmear, electroless copper, direct metalization and semi-additive processing— improved throwing power copper fill, enhancing through hole and microvia reliability, copper thickness requirements for thermal reliability and process controls

Self-Learning Educational Opportunities for Designers

happy_holden@mentor.com — Fri, 05 Jun 2009 22:10:48 GMT

Improving your personal performance is a large topic. But a critical area is high-frequency electrical performance for the board in both signals and plane PDN. Other new trends are incremental design/validation methodologies and the improved use of constraint-autorouting, as well as re-use of circuits and DfT. More on this in future BLOGS.

Here is where I suggest that you start looking for where you can learn these new topics. First, if you have not downloaded my new HDI HANDBOOK, this is a good place to start. The 631 page e-Book is FREE, so there is no excuse not to have it. You can download it from my BLOG at http://communities.mentor.com/mgcx/community/pcb/pcb_blogs/happy_holden . My Chapter-4 “HDI Electrical Performance” is written by Dr. Eric Bogatin, and Dr. Bogatin has many more resources available for learning. His past Web Series on “No MYTHS Allowed” can be downloaded from www.gigatest.com/Publications/PubsIndex.jsp This site has 105 documents, lectures and tutorials available from Dr. Bogatin. Figure 1 shows a typical slide form one of his lectures. Dr. Bogatin’s current Internet Site is http://www.BeTheSignal.com and it also has many free tutorials on it .

Another very useful design ‘Toolkit’ is provided by Kenneth Wood, owner of Saturn PCB Design in Deltona, FL.[3] His Toolkit is shown in Figure 2 and provides software to calculate physical and electrical characteristics of vias and conductors; signal bandwidth and max. lengths; differential-pair impedances; padstack designs; drill/wire gauge conversions; min conductor spacing for voltages; and microstrip/stripline impedances. This can be downloaded at: (http://www.saturnpcb.com )

Another source of training and learning is to use Google and Yahoo to search the Internet for college classes in signal integrity, EMI Compliance, Design for Manufacturing or high-speed design. One such search yielded the “EE166: High-Speed PCB Design” course at Harvey Mudd College in Claremont, CA. HMC has the distinction of being awarded “One of the Top Undergraduate Engineering Schools in the US”. In this case it was the lecture notes and labs by Prof. Sarah Harris -(www3.hmc.edu/~sharris/class/e166/)[4].

The IPC Designers Council and the IEEE are constantly running courses for designers.

Last, to reduce schedules is one of “Push Left”, “Do it right the first time” and distribute more activities in parallel. Move critical activities and checks/audits up earlier in the design process. Find any problems or mistakes early. IF [errors] found in manufacturing, critical schedules and costs are bound to be impacted. Now is the time to “learn to use the autorouter correctly” and “how to apply signal and power integrity”!

Finally, if you are “surplused”, “made redundant”, “sacked”, “displaced”, “sacrificed” or just “let GO”, Mentor has the “Displaced Worker Program”. [5] You may take Mentor classes on a “Space Available” basis, for free, and that includes online courses as well as in-class courses in Austin, Boston (Marlborough, MA), Chicago, Minneapolis, Dallas, Denver (Longmont, CO), Portland (Wilsonville, OR) and San Jose. Go to http://www.mentor.com/training_and_services/training/dwp to check on availability.

REFERENCES

1. HDI Handbook and other tech papers, tutorials at http://communities.mentor.com/mgcx/community/pcb/pcb_blogs/happy_holden

2. Eric Bogatin’s “No MYTHS Allowed” at GigaTest Labs, there is 105 doc. www.gigatest.com/Publications/PubsIndex.jsp & www.bethesignal.com

3. Free PCB Tools (www.saturnpcb.com) –vias, conductors, signals, diff pairs, padstacks, min. conductor Spacing & impedance.

4. University course lectures (like EE166 High Speed PCB Design by Dr. Sarah Harris of Harvey Mudd College-(www3.hmc.edu/~sharris/class/e166/)

5. If ‘out of work’, Mentor has the “Displaced Workers Program” allows you to audit our training for free, go to http://www.mentor.com/training_and_services/training/dwp

Buried Capacitance Materials for Power Integrity

happy_holden@mentor.com — Fri, 22 May 2009 22:38:00 GMT

For everyone using the new HyperLynx PI tool, here is a list of available PCB Laminates that are candidates for the PWR/GND pair in your stackup. This table is from page 217 (Fig 32) of my HDI HANDBOOK. IF you have not downloaded this free book, the URL is the 'BLUE BOX" on the 'right' here on my BLOG. The entire Chapter 5 is about "Materials for HDI" and you might find it interesting. This table is new and has the properties @ 1GHZ.

Some of the abbreviation used in the Table are: CCL=copper clad laminate; film=copper clad unreinforced polyimide film; Prepreg=epoxy fiber-glass coated b-stage material for lamination; RCF=resin coated copper foil; Sequential lam=the material requires some processing (one side etched) and lamination before it can be used; Both sides etching=the copper for PWR and GND can be etched and then the material laminated in to the stackup.

Free Download ! All You Wanted To Know About HDI....and MORE!

happy_holden@mentor.com — Tue, 20 Jan 2009 21:22:47 GMT

The HDI Handbook - A comprehensive high-density interconnection resource for designers, fabricators and assemblers

First Edition, Written by Happy Holden, et al., Edited by Happy Holden and Diane Neer Here is the link to DOWNLOAD the HANDBOOK (53 MB ZIP)

I have finally finished my book on high density interconnects (HDI). Along with the help of 9 friends and fellow PWB experts, we have created a 631 pages book about HDI.

FOCUS: This book is not intended to introduce PCB Technology to the reader, that is effectively done by Coomb’s PCB Handbook. It does take up High Density Interconnects (HDI) and microvias in much more detail than where Coomb’s left off.

The 16 chapters cover:

Section 1: Introduction

The widespread use of new electronic components employing Ball-Grid Array (BGA), Chip Scale Packaging (CSP), and other evolving technology form-factors means new fabrication techniques must be used to create printed circuit boards (PCBs) that will accommodate parts with extremely tight lead pitches and small geometries. In addition, extremely fast signal rise-times and signal bandwidths challenge systems designers to find better ways to overcome the negative effects of inductance, noise, radio frequency interference (RFI) and electro-magnetic interference (EMI) have on their product’s performance. The use of PCBs incorporating microvia circuit interconnects is currently one of the most viable solutions on the market. Assemblies can be charted by their characteristics. The interaction of interconnect elements, such as assembly, PC boards, and components, are described by their metrics: assembly density, assembly complexity, component complexity and board density. Happy Holden

Section 2: The Interconnect Market

HDI products, size and market growth rates, examples of different HDI products using the three Platforms: 1. Consumer and mobile phones, 2. substrates and 3. large-high performance boards. The “HDI Vintage Chart” with the three ‘basic’ characteristics of HDI architecture. -Karen Carpenter

Section 3: Design of Advanced Printed Circuits

As the electronic products industry continues to push the envelope of extreme miniaturization, product developments teams are being forced further into the realm of high density interconnect. Design techniques and substrates labeled exotic only a few short years ago are now considered mainstream. In particular, build-up substrate usage has grown dramatically, and is now found in a large percentage of high production electronic products. This Section is to educate and inform you on the technologies, needs, issues and solutions available today for advanced substrate design. The focus will briefly cover the 4 changes to TH PCB design techniques required for HDI and the IPC Design Standard 2226. -Happy Holden

Section 4: Electrical Performance

The good old days of 10 to 16 MHz clock frequencies are gone. It used to be the chief design challenge in circuit boards or packages was routing all the signals in two layers and getting packages that wouldn’t crack during assembly. The electrical properties of the interconnects were not important because they didn’t affect system performance. But the world has changed in the past 10 years. Clock frequencies on chip now are over 3 GHz, and on board, are over 800 MHz. In most systems, as the clock frequency goes up, the rise time always gets shorter. A shorter rise time means signal integrity problems increase dramatically. Signal integrity is broadly concerned with the problems that arise from how the electrical properties of the interconnects affect system performance. -Dr. Eric Bogatin

SECTION 5: Materials

Many new materials now support HDI. The material performance and slash-sheets from IPC HDI Material Standard 4104 explain many of these. -John Andresakis

SECTION 6: The HDI Mfg Processes

Various HDI mfg processes and structures are explained. These utilize standard PCB processes but with greater miniaturization and higher density. -Happy Holden

SECTION 7: Small Hole Creation

The machines, processes, quality concerns and issues with creating small vias. -Michael Carano

SECTION 8: Metallization

Desmear & metallization (electroless) ,including the materials and processes for paste in vias. -Michael Carano

SECTION 9: Fine-Line Imaging and Etching

Image transfer processes, stripping & etching fine lines, registration, equipment, and materials for fine-line image transfer. -Michael Carano from columns written by Dr. Karl Dietz

SECTION 10: Plating and Finishes

Plating, pulse-plating, small-holes plating and filling, final finishes. -Michael Carano

SECTION 11: Testing

AOI and electrical testing of HDI -Dr. Christophe Vaucher

SECTION 12: Quality, Acceptability & Reliability

Performance of HDI Benchmarking, Vendor readiness, qualification, quality issues, lab techniques and equipment. -Happy Holden

SECTION 13: Assembly Topics

Via-in-pad issues, fine-pitch, soldering & voids, in-circuit testing -Matt Wuensch & Mark Laing

SECTION 14: Embedded Components

Embedded Resistors, Embedded Capacitors, Distributed capacitance and Embedded Actives, the materials and design tools -Happy Holden

Section 15: Advanced HDI & Next Generation Technologies

The use of more complex components with very high I/O counts and increasing speed has pushed the interconnect into the realm of photonics and opto-electronics. The materials, processes and test vehicles for optical waveguides in printed circuits are reviewed. -Happy Holden

Section 16: HDI Substrates & Packages

This Section is to educate and inform on the technologies, design issues and solutions available today for advanced IC substrate design. The focus will briefly cover the challenges of wire bonding, flip chip, stacked dies and packages and through-silicon vias that allow various System-in-Packages (SiP) and 3D architectures. -Per Viklund

What will be growth industries for PCBs?

happy_holden@mentor.com — Thu, 13 Nov 2008 17:08:52 GMT

We have used the Edison incandescent light now for over 100 years. But, unfortunately, most of the power goes for heat and not light. The EPA says that if each US home replaced just ONE (1) incandescent light bulb with a solid state illumination LED (SSI), the USA would save more than $600 million in annual energy costs and prevent greenhouse gases equivalent to the emissions of more than 800,000 cars.

Some of the advantages of SSI LEDs are:

50,000 hours MTBF
LEDs are in 'mission-critical' applications already like street lights, traffic lights, automobile tail lights (soon to be headlights), stadiums and billboards, LCB backlights and for medical effects
70% efficiency (82 lumens/watt) compared to incandescent at 15% (17 lm/w) and compact fluorescent at 48-60 lm/w
A 100 watt incandescent bulb is 1750 luments, a 3 watt HB LED is only 240 lumens for the same lighting effect
LEDs can be color corrected to match sunlight
In less than 5 years SSI will be 150 lm/w and in the range of $2.00 - $7.00 each
There already are LEDs that work off of 117 VAC
Organic Light-Emitting Diode (OLED) displays are now in mobile phones and TVs
Compact fluorescent lights (CFL) have 3 to 5 milligrams of mercury and a difficulty in matching sunlight

I think that Solid State Illumination (SSI) or high brightness LEDs will be a BIG NEW business for the electronics industry. What do you think?

ADDITION:

David Carey of Portelligent just did a 'tear-down' of a CFL and a HB-LED of about 75 W rating. The CFL was sub-$5 but the HB-LED was ~$80 !! If you look at the photo from the article (http://www.eetimes.com/showArticle.jhtml;jsessionid=OXGNBXT450B1MQSNDLPSKHSCJUNN2JVN?articleID=210604761) below, the HB-LED must have been built for some'rugged' application. But both have circuit boards in them!!

YES, indeed, COST will be the driver but my money is still on the 110VAC HB-LED technology

Polymer printed transistors

happy_holden@mentor.com — Tue, 21 Oct 2008 04:01:03 GMT

This is a "COOL" technology. Imagine being able to 'print' transistors on 'paper' and other materials.

The bulk of the investment in printed electronics has been taking place in the West, including many factories coming on stream in 2007. This is well reported. However, there is now a surge of investment in printed electronics in Asia and many giant companies have entered the field for the first time. East Asian activity is poorly reported in the main but nonetheless very significant, because in East Asia they have much at stake. Asia already dominates in OLED production, with huge production and investment. The next generation of OLEDs will be flexible and printed and Asia must hold on to that too. China is now the world's largest user of RFID and it will shortly be the largest supplier and these tags are increasingly printed. Indeed, even the silicon chip in them will be replaced with printed logic at one hundredth of the cost, so trillions can be sold every year.

There are a remarkable 37 organisations working on printed transistors in Asia, with breakthroughs such as printable amorphous Ga In Zn O invented in Japan, one organization driving OLEDs with polymer transistors and another commercializing light emitting transistors. The plastic film scanner with no moving parts, e-skins, power sheets, various forms of electronics in biodegradable paper, a flexible organic battery that charges in only one minute, plastic film that acts as an ultrasonic transducer and plastic "e-paper" flexible displays are among the many new inventions being commercialized in the region.

I wonder if this type of electronics uses IC EDA tools or PCB EDA tools - - or a new hybrid of both?

PTS Coupons for TH Process Control

happy_holden@mentor.com — Tue, 21 Oct 2008 03:52:55 GMT

The parametric test system (PTS) was created by Hewlett-Packard's Printed Circuit Division in 1987 based on early H-P coupons used in production since 1972. Those early coupons focused on inner-layer shifting, by using the copper on I/Ls shorting to a PTH, moiré patterns, and hole quality cross-sections. Additional influence came from a parametric printed circuit board used as a training and process vehicle for the first NanYa PCB Facility in Taiwan (circa 1983). This PCB had various design-rule technologies on it and provided feedback on how the process was improving.

The H-P PTS was a group of seven coupons that could be placed on production panels or used on parametric panels to provide a snapshot of the capability of the processes. The initial seven coupons (Figure 1) were designed to test:

(a) Outer-layer registration
(b) Inner-layer registration and shifting
(c) Conductors/pads open and shorts
(d) Plated through-hole and I/L conductors continuity
(e) Artwork defects
(f) Soldermask registration
(g) Etch factors

The coupons were all designed to be tested by facility continuity testers using a bed-of-nails open-short testing machine. In H-P's case, the tester was an ATG2000 grid tester. The testers fault-file was captured by an H-P workstation and stored. Each coupon had a stored perfect response or netlist that was compared to the fault file and the opens and shorts were translated to dimensional shifts or other parametric data. The RS/1 statistics program was used to produce control charts and statistical reports, as well as historic data. To provide for process control, the coupons were reduced in size and small stand-alone coupon testers were built to allow operators to check the process immediately as a confidence indicator. These home-built milliohm meters worked with a simple 1-amphere power brick, a 4-digit digital panel meter and a machined-Plexiglas coupon holder with 8-spring-loaded gold pins wired to a 4-position rotary switch in a 4-wire Kelvin measurement scheme.

The Gerber artwork for these 7 PTS coupons are in the ZIP file at the end of this BLOG.

My Inverter to drive HD LEDs

happy_holden@mentor.com — Sat, 11 Oct 2008 16:58:17 GMT

Here is the 1-transistor inverter that will drive them I built. Hopefully, I can post the photo of my device.

Here is the lamp prototype to be built out of an aluminum sheet to hold my 5 LumiLEDs and 5 HD LEDs for my front yard light that keeps burning out in the Colorado cold.

Will There Be PCBoards in PV?

happy_holden@mentor.com — Mon, 08 Sep 2008 03:49:21 GMT

After 2 weeks of hearing about "Alternative Energy", I wonder if any of you out there are actually starting to see some activities in PV- Photo Voltaics? I know this is basically a 'semiconductor materials game', but that's for the solar cells. The solar panels can be build on large circuit boards and many of the thin-film PV technologies are coated on flex circuit material. I have frinds in Taiwan in the printed circuit board business that are diversifying into thin-film PV production. Many of the PC Flex board processes are remarkedly similar to the new PV conveyorized processes. You just need new equipment, but a lot of the equipment will support PV.

What are we doing in North America? The PV cell is DC. That means you need an inverter to turn it into AC. Then you need storage if you want to use it at night, and an "auto switch" if you want to put power back into the Grid. When it comes to DC energy storage, the old lead-acid cell is still the cheapest, but we gave up making BIG lead-acid batteries many years ago. Where do you get them? And how much energy do you loose in even the most efficient inverters?

Right now Japan and Germany lead the world in installing PV, but that's because there are Gov't rebaits. From the graph below from the Deuches Bank, PV will not reach cost parity with buying electricity in N.A. until early 2012. Until then, is growth dependant on Gov't rebaits?

Wifi Signal Strength

happy_holden@mentor.com — Fri, 29 Aug 2008 19:53:01 GMT

I usually have some tid-bit to tell all of you, but this time I need some help!

How do you determine the sensitivity of your Intel WiFi? I have two notebooks (from different mfg's) and a large older desktop. All have Wifi (the desktop has it as a PCCard) but they all seem to have different sensitivity to wifi. All are used on my desk, so location is approx. the same but when I look at "what out there", I get a different list and different advice on 'signal strength'. Obviously, the attenna circuit can be inplemented differently on each machine. I just wonder if there is a way to "calibrate" or measure my wifi's sensitivity?

I'm an old 'electronics hobbyist' and I have half a mind to build a "Signal Strength Meter" from all the parts I have from old HAM radio days. Anybody have a circuit or "Shareware" that actually has a wifi signal strength meter?

What's important when you want to "design for the lowest cost"?

happy_holden@mentor.com — Mon, 18 Aug 2008 19:48:26 GMT

In addition to "doing everything right", I think there are 6 other ideas that can help lower the manufacturing cost of a PCB.

1. Understanding First Pass Yield (FPY) in Mfg.- The mfg. yield of a PCB can be predicted for a particular fabricator by 'calibrating' that fabricator's capability. 75% of the cost of a PCB is based on the design (20 - 25% is cost of inventory and factors not related to the PCB process) and average yield is based on how "complex" the design is. More layers, finer lines, larger size, smaller holes, total number of holes, etc all make the PCB 'complex' to manufacturer. So once you have a fabricators "Capability Coefficients", you can take the PCB Complexity Index (made up of critical design features) and estimate the FPY. This can be as accurate as +/- 3-5% if the fabricator has his manufacturing process under control (not to much design can do if employees are not trained, quality procedures not observed or equipment not maintained). This FPY provides insight into how much this design will cost with this fabricator.

2. Selecting the best PCB materials to lower costs-Many are not familiar with the mfg's of laminates in Asia, even though they are now the largest materials suppliers in the world. NanYa Plastics, Panasonic and Kingboard are No. 1, 2 & 3 in the world. Because of this they have some of the lowest priced FR-4 laminates that meet all the MIL & IPC specs for FR-4, including lead-free assembly. Newer laminators like ITEQ, ShengYi, Doosan, Chang Chan, Grace and TUC are now also in the North American market selling their laminates. Since laminate is the single largest cost of a PCB, it makes reviewing these new suppliers worth the effort.

3. How to reduce layers in a PCB multilayer-Mentor has developed a better strategy for fanout of BGAs > 400 pins that can lead to reducing the number of signal layers in a board. If HDI-microvias are also used, then the layer reduction can be significant with these new 'aligned-via patterns'. The layer reduction is large enough to pay for the increased price of HDI, plus some extra!

4. Design for Fab (DFF) Best Practices-Nothing beats "Best Practices" in terms of design rules, spacings and other layout techniques that minimize fabrication and assembly problems.

5. Understanding if a PCB Fabricator is Capable of building your design at high FPYs.- What if a fabricator's FPY is low for your design? IPC has created a Benchmarking Program that test a fabricators capability, the IPC-9151 Benchmarking Panels. This is a set of PCB panels from 2 to 24 layers, created with different hole, pad, trace and spacing geometries. The artwork is free and available at http:///www.pcbquality.com . A fabricator can download the artwork and build the Benchmarked panels. There are two licensed facilities that have the extensive test equipment to evaluate these panles and produce the comprehensive report. The Program is called PCQR2, for Process Capability, Quality and Relative Reliability, because it also takes the via daisy-chains and subjects them to 500 cycles of -45C to 145C. The panels are designed to provide a 99% confidence of only a 1% error statistically in the data.

6. Since Volume is the No. 1 PCB Cost-driver, what about Asian Fabrication (China)? There are a lot of N.A.PCB prototype houses and sales organizations representing the vast number of PCB fabricators in Taiwan, Japan, Korea, Thailand, Mayasia and China. If you are confident that a fabricator in Asia is 'capable' of building your board, then Asia has the lowest prices. Asia many times also wants very high volume, but there is a growing number of Asian fabricators that specialize on lower volumes and even the techniques of mixing a number of different PNs (proving they are the same thickness and layers) on the same production panel. This allows for a larger Order Quantity.

How do you get started in HDI?

happy_holden@mentor.com — Mon, 18 Aug 2008 19:45:24 GMT

A lot of my time is spent helping customers implementing HDI. I also spend a good deal of time teaching seminars on how to get started in HDI. The most frequent questions I receive are:

How Do I get Started?
How can I deal with a fabricator that states he can not build it to your recommendations?
What do we have to do to convince management that this is worthwhile?

In response to these questions I give them the following information.

To successfully implement HDI Technologies in "A Printed Circuit Board Program", here is a 4-Phase approach that I follow.

Education / Planning / Vendor Audits
Do you really need HDI? I have a "White Paper" here at mentor.com/pcb called "How To Get Started In HDI With Microvias" that will help answer that question. But if you do, then the First Phase is Education, planning the HDI program and becoming involved in HDI vendors. Education meands learning IPC HDI Standards, understanding the quality issues with Microvias and the potential problems fabricators may have. Learning to use the IPC-9151Benchmarking artwork to qualify HDI Fabricator is a great way to pick your potential partners.
Test Vehicle Creation and Testing
Phase TWO involves actually creating the Test Vehicles to learn more about HDI performance, your vendors performance, how new materials perform and gaining reliability data. Learning from others experiences in implementing HDI and test vehicles helps shorten this phase. Plus, their results and data is useful to compare to your results. The testing of signal integrity and power integrity of HDI structures is an important justification for management to demonstrate how electronic performance can be significantly improved while shringing the size of these assemblies.
Redesigning a Current Board to HDI
Phase Three can be undertaken simultaneously. You need to understanding the new strategy of HDI BGA Fanout & Routing. This is a new strategy created by Charles Pfeil of Mentor and a reference to his new book can be found at www.mentor.com/go/bga_._ Understanding prior case studies and success stories on "How to save layers" and "Designing HDI with the fewest layers" helps in this activity. I have a White Paper on "The Essential Differences Between Through-Hole and HDI Design" available on this web site.
Putting It All Together- "Next Step"
Phase Four: Once you have successfully navigated the first three phases and have HDI implemented, it's time to look to the 'future'. Back to learning, but this time learning about the Advanced HDI Structures (from Asia) and being introduction to Embedded Technologies. These technologies are the 'next step' in HDI!