Hi,

Joel Jensen here.

I have been with Mentor Graphics for 1 year now working as a CAE for Calibre Extraction products.

In my previous incantation, I was a CAD Engineer for 9+ years in SOC Design.  My role was design methodology and all phases of design except the layout, included, but not limited to, spec., RTL development, synthesis, STA, simulation, scan insertion, ATPG, and parasitic extraction.

On the personal side, you can usually find me fighting fires, sailing, re-roofing the house, or just relaxing (ya, right).

I welcome the opportunity to get to know and interact with our customers more.

See ya around.  

Hi everyone,

I have been asking for a site like this and I'm glad Mentor put one together!

I hope this can be a nice complement to the supportnet material that's already available.

I'm Daran Davis and I have been working as a CAD engineer for 14 years at various

companies. I started out with Motorola in Phoenix doing PDK

development. I worked on a team of engineers that collaborated with EDA

vendors to reduce PDK development from ~6 months to 3 weeks. This

project was the early precursor to much of the PDK development

automation that I see EDA companies like Cadence offering as a service.

I then moved on to LSI Logic in Colorado to support an Analog design and

layout group. This was my first introduction to many of Mentor's tools.

I developed many PDK's for internal and external foundaries and began

using a new tool called Calibre  :x. I focused more on backend development by

working with Mentor on their then new device generators and adding a schematic

driven layout flow.

Currently, I'm at Lattice semiconductor in Hillsboro Oregon. My focus recently has

been on xRC/LVS/DRC for our internal PDK's. I feel xRC is the most

challenging of these areas mainly because there are so many different

ways that it can be run to produce the required netlist and also

because it's hard to confirm that the results are correct.

Daran

Hi everyone,

I'm James Paris and have been working as a Calibre Technical Marketing Engineer at  Mentor since  2000. During that time, I've supported DRC, LVS and a little bit of extraction. I spent many years supporting our customers who use Calibre within the Cadence environment and PDK development. Prior to working at Mentor, I spent about 8 years doing custom layout, CAD, and a little bit of place and route as a back-end AMS layout engineer using primarily Cadence tools.

I really enjoy working on PV methodology issues and prototyping flows that solve real customer issues. Currently, I am supporting Calibre DRC with a focus on Calibre Incremental DRC and hierarchical database compare with DBdiff. I look forward to participating in this community to provide additional support to our customers.

James

Hi

My name is Luan. I've been a Cailbre user for quite some time. My focus area is design kit development and I had worked on many DRC, LVS, and extraction flows. In conjunction with technical duties, I manage a CAD team.

I am looking forward to participate in these forums.

Regards

Luan

Hi everyone,

I am Nicolas Richaud (Nico). I have been for 3 months by  Mentor. I do like Architha the Associate AE program with Calibre in Europe at our Munich office.

In resume, I studied at the electronics engineer school of Bordeaux (ENSEIRB) in France and I did my Masterthesis at Infineon in collaboration with the Munich University.

The Theme of my masterthesis was to develop an application to help retroengineer = legal spying  )

Otherwise, by living in Bordeaux (city of wine) and Munich (city of beer), you can understand that I enjoy life. Rugby, mountain sport and languages are some of my favorites hobbies as well.

Have fun!

Nico

Hi,

I'm CAD engineer on design kit development and mainly on DRC, LVS.

very happy to meet you.

Fabrizio

Hello all,

I'm Roman Kaganovich and I work in Marvell Israel in Layout CAD group.I'm working with Calibre LVS/DRC and Designrev.

My hobbies is hiking, street fight sport and brasilian jiu-jitsu.

Hello Karen,

I'm from Haifa and I'm working in Yokneam - small city around 20km from Haifa.

BTW, I like Israel too  

Hello Karen!

The Gardens wasn't affected by Hesbollah bombing. I say even more, the mass media show this conflict much more dramatic of the real situation. But they work for reiting

I invite you to visit Israel again, we have beautiful country and beautiful people.

I'm Bob , Calibre PVX AE in Korea. I've been in MGC/MGK for 3+ years. I forcus on Calibre eqDRC/YA/YE this year. I worked as CAD engineer to develop the libarary, verfication kit, simulation and systhesis kit before joining MGC/MGK.

I hope to see you at other community pages soon.

Bob.

Jeff T. Young here, and 'ello to everyone.

I've been with the Calibre team as one of the RET docs writers since the middle of 2004 (though I've been with Mentor a lot longer), and my expertise is juggling the various RET Modeling manuals while simultaneously building customer-to-docs relations in the Calibre User Advisory Panel.    My belief is that the documentation should reflect the customer's needs as much as possible, and that the company is only part of the solution.

I'm definitely a hands-on sort; give me a test case and a reason someone would use it, and I'm interested in turning it into something everyone can wrap their mind around. 

My current pet project for 2008 is the complete overhaul of our backbone modeling docs  -- Calibre WORKbench and the Dense Modeling Reference.   I'm privileged to be working with an excellent team of dedicated TMEs to make this happen. 

-Jeff

Hi everyone, I'm Dhaval Shah and I have been working with Mentor Graphics in various roles since 2004.  I started at Mentor as Associate Technical Marketing Engineer for analog mixed-signal product line in Wilsonville, Or.  Then I moved into customer support and since last 2 years I am in San Jose working as as application engineer.  I have started supporting Calibre product line since end of last year.  I look forward to participating in this community to provide additional support to our customers.

-Dhaval

Hello everyone;

I'm Erum, and I work at Pacific Design located in Karachi ,Pakistan as a Design Manager . I started my career working at Pycon Inc Karachi, a Burn in design subsidiary of Pycon Inc Santa Clara ,first as PCB design engineer, then as Quality Assurance engineer, then as Design Manager. I then moved to Pacific Design . My company is invloved in designing of test boards, basically; Burn in, HAST, high power,Probe cards & load boards using PCAD, Allegro & Altium.

Hello, and thanks to Mentor for creating a forum like this.

I'm Jeffery Hildebrand (I like the alias Jrah, it's my initials and much shorter to type), and I've used Mentor tools at various companies since 1986.  Anyone else remember the Apollo work stations?  Currently I'm at Boston Scientific and use Calibre for verification of chips for use in implantable medical devices like pacemakers.

Our priorities in the medical industry are a little different than what I experienced at companies like Lucent or Agere, there's a much higher premium placed on low risk and high stability.  So our use of Calibre has to be repeatable and as bug free as possible.

I also use many of the Cadence tools, and so integration is important to me.  Getting them to work together can sometimes be frustrating.

jrah

Hello,

My name is Klaus Kaiser. I work at Liebherr Elektronik GmbH in Lindau, Germany. My job is to model components for use in SystemVision. When my models will finally be deployed, the circuit designers will switch to SystemVision for schematic entry and simulation. Then, I will also maintain the model data in the component database and support the circuit designers.

I would be glad to learn about other members' experience with SystemVision, especially regarding VHDL-AMS models.

Klaus.

Hi Karen,

so far, I have made generic models for passive and active discrete components, mainly by using the Edulib or VDA models with small changes. Currently I'm working on a generic transformer model. I have also started to develop VHDL-AMS code to make it possible to draw ICs with several functional blocks and separate power blocks, i.e. to draw multiple instances of an opamp and a block with supply voltage terminals which are actually one dual or quad opamp IC. This would probably be easy in the SystemVision standalone, but the SV overlay (for use with Expedition 2005) cannot handle heterogeneous symbols. The Mentor support told me to use signals or quantities with identical names to link the blocks, but this does not work. Currently, I am waiting for a reply from the support team about this problem and proceed with my transformer model and documentation.

The next steps will be to fill a database with component-specific model parameters and let circuit designers use this as a test environment. When this works O.K., the data will be copied to the production database. Later, I will improve the models, i.e. by modelling parasitics or adding code that issues warnings when component specifications are exceeded.

Hi all,

Iam venugopal working as design eng in AMD iam using calibre for my verification of layouts

nice to meet you all

Hi All,

I am Andrew Ng who is working in a IC Design House in Hong Kong.

My job responisibility is to provide a internal verification set (DRC, LVS, Antenna) which used in my company.

Nice to meet you all here!

Best Regards,
Andrew Ng

Hi Andrew,

Greetings from California, nice to meet you!

-chris

Hi Hongwei,

Nice to hear from you. Thanks for saying hello.

-chris

Hello Margo,

One suggestion for quickly understand the LVS output from Calibre is to use RVE to help debugging

layout. Also, I believe that the Calibre's document has suggestions for understanding LVS report.

My experience with deciphering LVS output is followed:

- scan the report for the summary section that describes matched and unmatched devices

- look at the discrepancy list for nets, devices mismatch. Usually, device mismatch are a result of
  mismatch in connections for the terminals (D,G,S,B).

- also, I scan the run logfile, to understand why a certain device is not derived correctly from the

  operations that are setup to recognize the gate region.

- look at the extrated layout netlist either in RVE or in the text editor.

I think that having a formal training thru Mentor will also complement the learning.

Luan

Hello Margo,

Mentor Graphics offers the "Calibre nmDRC / nmLVS" which may meet your need.  Please visit http://www.mentor.com/training_and_services/training/schedule/index.cfm for more details.

Thank you.

Paul

Hi Tou Kyou,

Glad to meet you! Thanks for joining the forum.

I hope you find things here that make your job easier and more interesting.

In case you have come across anything in your experiences these past three years that you think might be of interest to other Calibre users, I would be very interested to hear about it.

Thanks,

-chris

Hi Zhen,

Pleased to meet you. I agree, it will be nice to have a chance to help each other.

Which Calibre tools are you setting up?

Great. I hope you have a chance to post any issues or insights you have over in the DRC or LVS area. I'd like to learn more about this process and working through a few issues might be an ideal way to do that.

FreePDK45nm

Hi Lyle,

Welcome to the Mentor Communities. You should check out this link and maybe post your question there so that PCB folks will see it:

http://communities.mentor.com/mgcx/community/pcb

Good luck!

Hi Lyle - I've posted a response to your questions in the other thread.  http://communities.mentor.com/mgcx/message/11511#11511