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2,400 Views 3 Replies Last post: Mar 23, 2012 8:01 AM by chris_balcom RSS
5thmassiv Lurker
5thmassiv
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Mar 23, 2012
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Mar 23, 2012 6:23 AM

instead of "LVS SPICE CULL PRIMITIVE SUBCIRCUITS" command

I have an empty schematic cell that brings to errors during verification. In the mean time I don't want to use "LVS SPICE CULL PRIMITIVE SUBCIRCUITS" command. How and what funtionality can I use to make these cells to be treated as non-primitive cells without using LVS SPICE CULL PRIMITIVE SUBCIRCUITS command.

chris_balcom jedi
chris_balcom
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Apr 3, 2008
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Mar 23, 2012 7:28 AM in response to: 5thmassiv
Re: instead of "LVS SPICE CULL PRIMITIVE SUBCIRCUITS" command

This can be added to the rule file to filter away certain empty subcircuits from the source by name:

 

LVS FILTER mysubname OPEN SOURCE

5thmassiv Lurker
5thmassiv
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Mar 23, 2012
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Mar 23, 2012 7:55 AM in response to: chris_balcom
Re: instead of "LVS SPICE CULL PRIMITIVE SUBCIRCUITS" command

Thanks for your response Chris.

 

Actually I don't want to filter them out. Just imagine that I have empty subcircuits in a schematic netlists which have appropriate layouts. And I want to gave a tool to not see them as an empty subcircuits.

chris_balcom jedi
chris_balcom
397 posts since
Apr 3, 2008
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Mar 23, 2012 8:01 AM in response to: 5thmassiv
Re: instead of "LVS SPICE CULL PRIMITIVE SUBCIRCUITS" command

I'm not aware of a way to treat an empty subckt as non-primitive. Maybe someone else reading this has an idea?

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