We are just starting with SystemVerilog, therefore with OVM, and Questa. To start we make a new project, a new library and a new SV file like the following.
class test extends ovm_void; endclass: test
However when we try to compile this, we get this error:
# ** Error: D:/projects/Math2mat/implementation/questa/test/test.sv(1): near "ovm_void": syntax error, unexpected "IDENTIFIER" # ** Error: D:/projects/Math2mat/implementation/questa/test/test.sv(1): Error in class extension specification.
As a next step we tried to do this:
`include "ovm_pkg.sv" class test extends ovm_void; endclass: test
What in turn generates other errors:
In my (newbie) opinion this was more a question about Questa than OVM, that's why I posted it here. I didn't thought about posting it on ovmworld, but will consider it for following up questions. Thanks also for the link to the verification guild, didn't knew it before.