Log in to follow, share, and participate in this community. I have a 6 layer design where I want to check nets crossing plane gaps. But, I only want to check against certain layers. Specifically layer 1 and 2 where layer 1 is signal layer and layer 2 is split PWR/G... Hi, Good day I am initial stage in HLDRC, So i ask the question some time is . o k .,,, come to the point I am allegro user I have the board file, when i import .brd file its automatically take constraint m... New in HyperLynx DRC VX.2.4: automated high-voltage creepage checks that eliminate the tedious work associated with PCB validation and make it easy to find design errors. Watch now!