• How is HyperLynx DRC different than other commercial DRC product offerings?

    HyperLynx DRC offers much higher capacity and much faster runtimes than other tools due to the pattern matching of its unique geometry analysis engine which enables efficient/compact rule coding. In addition, the open...
    cathy_terwedow
    created by cathy_terwedow
  • How do I use the Impedance Rule DRC to check different target impedances?

    Most nets are designed with 55 Ohm with a tolerance of +/- 10% of the target impedance. DDR3 has 45 Ohm target impedance +/- 10%. So, a common question is whether to run the Impedance Rule with 55 Ohms and then change...
    cathy_terwedow
    last modified by cathy_terwedow
  • Where do I get the IBIS model for the part in my design?

    IBIS models can be found/verified online by the specific vendor/provider you are using. Please contact that vendor directly or search for online communities. There are many options available for free downloads of veri...
    cathy_terwedow
    created by cathy_terwedow
  • I have an .hldproj file. How can I change the parent setting for this project?

    You can promote the setting to a parent HLDSET file with the command under Setup menu.
    cathy_terwedow
    created by cathy_terwedow
  • How do I translate PCB layout data from Allegro to HyperLynx DRC? Do Allegro and HyperLynx DRC have to be installed on the same machine?

    Before loading a BRD file in HyperLynx DRC, you must set one, or possibly two, environment variables related to the Cadence Extracta utility. The following procedure applies to both Windows and Linux installations. P...
    cathy_terwedow
    created by cathy_terwedow
  • How do I translate PCB layout data from IPC-2581 to HyperLynx DRC?

    To open an IPC-2581 design in HyperLynx DRC, simply point to the *.XML file.
    cathy_terwedow
    created by cathy_terwedow
  • How do I write custom DRCs? What scripting language is used and supported by HyperLynx DRC?

    The HyperLynx DRC Developer license allows you to write custom DRCs that are specific to a technology or corporate guideline. It has its own scripting and debugging environment and supports VBScript and JavaScript. Al...
    cathy_terwedow
    created by cathy_terwedow
  • What do the colored boxes next to recently executed rules mean?

    The red box indicates that some violations were found for that rule. The green box indicates no violations. The yellow box next to a particular rule group indicates that some of the rules have violations and s...
    cathy_terwedow
    created by cathy_terwedow
  • What does a design violation mean?

    It means that a rule was run on the objects specified and some objects exceeded the violation conditions. To know what the conditions are, click on the Violations Conditions link at the bottom of the rule slide.  ...
    cathy_terwedow
    last modified by cathy_terwedow
  • Can I measure the distance between the XY coordinates of two points?

    Yes, select the distance measurement tool from the tool bar.   To measure distance between point A to point B, click on point A and drag toward point B. The distance is displayed in real time.
    cathy_terwedow
    last modified by cathy_terwedow
  • What does “local model index not found” mean?

    The Local Model Index is an index of the IBIS models that HyperLynx DRC has at its disposal for the specific design that’s open. It is used to quickly access an IBIS model (IBIS models are not needed for analysi...
    cathy_terwedow
    created by cathy_terwedow
  • HyperLynx DRC has a field solver. Does it provide the same result as the field solver in HyperLynx SI?

    HyperLynx DRC and HyperLynx SI share the same field solver. So, if the stackup is identical, both tools provide the same result. However, because HyperLynx DRC currently does not support silk layers or trapezoidal sha...
    cathy_terwedow
    created by cathy_terwedow
  • How do I create Object Lists?

    The steps are: Expand the Analysis Setup under the Project Explorer: Expand the + button by Users Object Lists. Click the right-mouse button on Users Object Lists and select New List. For this example, I named th...
    cathy_terwedow
    created by cathy_terwedow
  • How do I define a differential pair? Differential pairs in my design are not listed in the Differential Pair Object List.

    Use the following steps to define a differential pair: Create a new Object List entitled Differential_Pairs. Select Object Type as Diff Pair in the Properties window of the Differential_Pairs Object List. Set C...
    cathy_terwedow
    created by cathy_terwedow
  • How does HyperLynx DRC create electrical nets?

    Sometimes high-speed signal nets have series resistors between the driver and receiver pins. The resistor divides the trace to create two physical nets on both sides of the resistor. HyperLynx DRC combines the two phy...
    cathy_terwedow
    created by cathy_terwedow
  • What is the relationship between the .hldset and .hldproj files?

    Here is a useful diagram from the help documentation and HL DRC user guide: *.hldset is the main system file. The .hldset is at the top of the tree and the settings saved in the .hldset can be shared and distributed...
    cathy_terwedow
    created by cathy_terwedow
  • Do I need an IBIS model?

    IBIS models are not needed to verify a design. If available, HyperLynx DRC extracts the rise/fall time, voltage, and pin types (input/output) from the IBIS model. If IBIS models are not available, the default values c...
    cathy_terwedow
    last modified by cathy_terwedow
  • How do I translate PCB layout data from Zuken to HyperLynx DRC? Do both products have to be installed on the same machine?

    HyperLynx DRC does not have to be installed on the same machine with any Zuken product (PWS, CR-3000, pr CR-5000). To open Zuken layout files in HyperLynx DRC, simply point to the *.BSF file for Zuken PWS and CR-3000,...
    cathy_terwedow
    created by cathy_terwedow
  • How is constraint information used (CES Constraint Manager for Xpedition Layout)?

    HyperLynx DRC imports layout data from many layout formats (Xpedition Layout, ODB++, 3rd-party tools, etc.). Constraint information is read from the layout data upon import. TechNote MG586648 explains the specific dif...
    cathy_terwedow
    last modified by cathy_terwedow
  • Why are so many false violations reported?

    Depending on the scope of the rule, false violations can be generated. To limit the scope of the rule, you can create an Object List that contains only specific nets, such as DDRx nets, and run the rule on the specifi...
    cathy_terwedow
    last modified by cathy_terwedow