I have been able to successfully install and verify the DRC software, but when I run it I get an error saying it has stopped. No other info is provided but the option to send a report is given, which I have tried. Thi... I would think that the minimum impedance is the actual trace impedance on that layer when matched. I set the diff rule to 80 ohms. The clocks below were set to 82 ohms differential but HL DRC is displaying 92.77 ohms... HyperLynx DRC can import layout data and files from the following tools and formats: Generally, data does not need to be translated into Mentor’s Xpedition format. If your layout tool is not on this list, use... Our Tech Support team received a question about installing and running the HyperLynx DRC Free Edition. We’d like to share our response here in the community for everyone to see. The customer reported the followi... I get a text box saying "An unknown error occurred while accessing C:\Users\JOHNHO~1\AppData\Local\Temp\hldproj27581.tmp when I try to save a project. The folder location has these .tmp file in it O.K. Used HyperLynx DRC Free on one project and got lots of false positives for the crossing voids rule between layers 5 and 6 on a 6 layer board. Also saw a peculiarity with the diff impedance calculation; i.e. difference... No. Netscape is not a a supported browser on Support Center. To take advantage of Support Center’s features, one of the following internet browsers is required: • Internet Explorer 11 • Microsoft ... PADS Layout and HyperLynx DRC do not have to be installed on the same machine. To open a PADS Layout design in HyperLynx DRC, simply point to the PADS Layout *.PCB file. Alternatively, you can export a *.HYP file from... No, HyperLynx DRC and Xpedition are not required to be installed on the same machine. HyperLynx DRC standalone is independent of Xpedition and can accept the Xpedition layout file formats (*.CCE, *.CC) to import the P... Technical support for the HyperLynx DRC Free and Gold Editions is delivered here in the HyperLynx DRC community. In the community you can: post product usage questions, interact with other users and Mentor technical e... HyperLynx DRC is a programmable electrical rule checker for PCB and advanced IC packages. It examines PCB and IC package physical layout data for electrical performance violations of a set of pre-defined rules (specif... The install tree for the HyperLynx DRC Free and Gold Editions contains a sample database/design that you can use to familiarize yourself with the software. The sample design (*.CIBD file) is located in the …\SD... Physical layouts of PCBs and IC packages typically require multiple layers of signal interconnect and power planes for implementation. Oftentimes, the physical arrangement of signal and power-plane metal shapes result... HyperLynx DRC elevates overall electrical performance, increases design quality, and accelerates electrical design closure and final sign-off. With HyperLynx DRC, you can quantify design quality and determine which vi... HyperLynx DRC offers much higher capacity and much faster runtimes than other tools due to the pattern matching of its unique geometry analysis engine which enables efficient/compact rule coding. In addition, the open... Most nets are designed with 55 Ohm with a tolerance of +/- 10% of the target impedance. DDR3 has 45 Ohm target impedance +/- 10%. So, a common question is whether to run the Impedance Rule with 55 Ohms and then change... IBIS models can be found/verified online by the specific vendor/provider you are using. Please contact that vendor directly or search for online communities. There are many options available for free downloads of veri... You can promote the setting to a parent HLDSET file with the command under Setup menu. Before loading a BRD file in HyperLynx DRC, you must set one, or possibly two, environment variables related to the Cadence Extracta utility. The following procedure applies to both Windows and Linux installations. P... To open an IPC-2581 design in HyperLynx DRC, simply point to the *.XML file.