• Decoupling analysis with inductors

    Good afternoon,   I have seen this topic mentioned before but I really wanted to have a full picture. Is it possible to include an inductor in your decoupling analysis? I am analyzing the VDD pin of an IC and t...
    xenxo
    last modified by xenxo
  • Missing Reference Layer

    Good morning,   I am trying to carry out a distributed decoupling analysis. The "Decoupling Wizard" warns me that there is no reference layer on that particular power pin. However, I can clearly see the referenc...
    xenxo
    last modified by xenxo
  • What is the best method for working with an Altium to Hyperlynx setup?

    We are working with a customer that wants to use Hyperlynx for Simulation after completing their design in Altium.  It seems that Altium does not export Part names or values hence all R's & C's values are w...
    brian1
    last modified by brian1
  • plane noise analysis principles

    Hello,   I would greatly appreciate for a a more detailed explanation on how to interpret the plane noise analysis in hyperlynx. In my opinion it would be great if information provided in the product help and t...
    rasputin83
    last modified by rasputin83
  • How does Hyperlynx define "Rise Rail Overshoot"?

    In a simulation, the rise rail overshoot is nearly -2V for some signals. I am trying to understand the exact meaning of this parameter and how it correlates to the actual overshoot of this signal.   Thanks
    kyleremich
    last modified by kyleremich
  • ODT model selection????

    I am new to hyperlynx!! What is the significance of ODT model selection during DDRx batch simulation? And also ODT behavior? It will be a great help if you explain in detail.
  • LPDDR3 EBD Model Assignment Issue

    I am first time user of EBD files in Hyperlynx. The LPDDR3 model I'm using was provided from a supplier in a zip. I have imported layout (.brd file) into hyperlynx. LPDDR3 and processor are on same board. I have ...
    n_jadhav_jhnn7
    last modified by n_jadhav_jhnn7
  • BCI Test Analysis

    Hi everyone, We need to check the layout for BCI test. I have a board that can't pass this test all the time, I've tried many ways to pass it using CMC, LC, FB filters. Finally, the other day, I measured between the ...
    gokhannsahin
    last modified by gokhannsahin
  • Decoupling Capacitor Model Type

    Hello, I have recently started to use HyperLynx so I apologize in advance if the following questions are basic. There are 3 types of Models for the capacitors: 1) Simple C-LR    The capacitance value, is...
    xenxo
    last modified by xenxo
  • If IBIS model is not available?

    I have to do SI Analysis for communication Signals, but i have n't found Ibis model for that IC. Can any one pls tell me is there any method in hyperlynx to do the analysis without IBIS model. Actually iam using cmos ...
    ecs
    last modified by ecs
  • Termination

    hi, i have small doubt regarding termination, for bi-directional signals whether we can use series termination at both driver & receiver IC or not ? is there any other termination we can use?     than...
    ecs
    last modified by ecs
  • If IBIS Model is not avaliable?

    Hi, I am doing the SI analysis for communication Signals, but i have not found the ibis model for required IC, is there any possible method in hyperlynx to do the analysis without IBIS model. Actually i doing the ana...
    ecs
    last modified by ecs
  • DDR WIZARD SETUP

    we are simulating DDR3, in the DDR3 Wizard setup i have an doubt in simulation option, in the section measurements location for DDR & Controller what has to be enable either die/pin.
    ecs
    last modified by ecs
  • VIX MARGIN

    RUNNING THE DDR3 SIMULATION, IN THIS SIMULATION THE CLOCK SIGNAL GETTING FAILED BECAUSE OF VIX MARGIN, CAN ANY ONE TELL ME WHY ITS GETTING FAILED/SUGGEST THE SOLUTION . MY OPERATING FREQUENCY IS 400MHZ, & IAM USIN...
    ecs
    last modified by ecs
  • Hyperlynx VX2.4 Digital Oscilloscope Eye-Diagram configure window not opening

    Hi,   I am using Hyperlynx VX2.4. I tried to do an eye-diagram simulation and when I tried to configure the eye mask and other parameters using the eye-diagram configuration file, this window is not displayed. ...
    roberto.torres@harman.com
    last modified by roberto.torres@harman.com
  • Hyperlynx : DRR3 Batch Simulation Data Read Problem

    We are simulation DDR3L in our design and we are trying to simulate our chips through Hyperlynx DDR3 batch simulation. We have used one slot dual ranked settings. After setting the parameters required for DDR3 batch s...
    m.ather
    last modified by m.ather
  • Adding Parasitic Resistances

    Hi,   I have been using the PI tool for a little while, and it would be very helpful if there were an easy way to assign parasitic resistances to the inductors on my board.  Is there anyway to do this in Hy...
    matthewd49
    last modified by matthewd49
  • Asigning PSPICE capacitor model

    I can asign PSPICE models to most ICs, however that option is not available with simple capacitors. How can I use a capacitor PSPICE model for AC coupling in Hyperlynx for a SI simulation?
    valverto
    last modified by valverto
  • DC Drop Analysis

    Hi All, I am new to Hyperlynx and trying to do the DC Drop I would like to know if the switching regulator (power IC) has the inductor and capacitors in between the power pin so if i want to simulate the power net th...
    navi64
    last modified by navi64
  • Hyperlynx PI: current density failure due to big pads

    Hi   I am performing PI simulations for my high current board design. I have high current switches and MOSFETs in my design. Many of the components have big exposed pads as the power paths.  My problem is ...
    v_jn_azjq8
    created by v_jn_azjq8