• How to set Batch DRC to find shorts

    had a design where a "rogue" ground via has gone through an inner track and shorted it. would have expect the pcb batch drc to pick this up but it doesn't. What setting should I be looking for in the batch drc confi...
    greghall
    created by greghall
  • Is there any way to setup 3D DRC's to recognize metal surfaces on components.

    Just like the title implies, is there any way I would be able to define a surface on a part in 3D as metal and have it recognize in 3D DRC's or are 3D DRC's still limited to footprint defined attributes(such as PO-PO ...
    s_tiffany
    last modified by s_tiffany
  • Strange DRC error in Xpedition

    Has anyone encountered this error message?   What does it mean? Could not read hazard accept data from a previous session. For more information see: BatchHzdDeleteListErrorLog.txt   I've look in info...
  • Import step file in Xpedition

    I have a step file need to import in to the Xpedition layout file. Anyone help me how to import the step file into the Xpedition layout.
    Rapport
    last modified by Rapport
  • Plane shape stretch option i VX1.1 like EE7.9.5

    Hi All,   Is there any option to stretch plane shape in VX.1.1 tool like EE7.9.5 (Smart utilities option) .     But in EE7.9.5 tool has one more option like stretch. Kindly suggest we have plane sha...
    senthil530
    last modified by senthil530
  • FREE electrical rule checks - works with any PCB layout tool

    Layout DRCs are great but how do you find potential SI, PI, and EMI/EMC problems like impedance, nets crossing gaps, and metal islands in your design? It's easy with HyperLynx DRC.   We have configurations to me...
    cathy_terwedow
    last modified by cathy_terwedow
  • Thermal and EMI analysis

    In VX2.1 is there any tool which can simulate board to study thermal and EM interference, cross talk etc if we define what kind of signal is supposed to be there in a particular trace ?
    expertengr
    created by expertengr
  • Other Side Pin Keepout

    Hello all,   does your ERF for Other Side Pin Keepout work properly? I have a problem the under a THT are some discrete parts and these won' t be detected by the rule. Please tell me if there is any hurdle i do...
    agmach
    last modified by agmach
  • How to do constraint for DDR3 or DR4 designs in Xpedition Vx

    I am using DDR4 in my design with different Byte lanes. I want to know how to set constraints for DDR signals in Xpedition Vx.   1. How to create pin pair 2. How to assign different pin pairs of same net in dif...
    Rapport
    last modified by Rapport
  • Understanding the target length and tanges displayed in the Tuning Meter

    This document explains all the factors and data point considered by the Tuning Meter, and discusses how it arrives at the ranges and targets shown and why they can differ from the ranges shown in Constraint Manager.&#...
    john_short
    last modified by john_short
  • Eye diagram of transmitter pin

    Hi,   I simulated a differential trace in hyperlinks and got an unexpected eye diagram at the transmitter side. receiver side eye diagram is good but I could not understand why the transmitter side eye diagram l...
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    PCB Forums bring Mentor customers together to learn new ways to maximize productivity and tool usage. Register to attend one of the 40+ PCB Forums worldwide   Find a PCB Forum near you
    john_short
    last modified by erin_gowdy
  • Where is the config for VBreport kept (Report Writer)

    I need to run VBReport on my layout to produce an ipc netlist and also Fabmaster outputs.   This used to work on my pc, however I went into vbreport today and there were no output options available (nothing to s...
    greg.hall
    last modified by greg.hall