• Trace matching length

    What is the best way to match traces of an address bus? Shall I create ordered netlines for each of the memories on the line, from pin to pin for example from pin 1 of memory U50 to pin 1 of memory 51 and so further?...
    last modified by tsvetomirasenov
  • Planning placement before layout creation

    Hello all,  I am using VX2.4 version, and trying to plan components topology before creating the layout. To do so, I have already grouped the components, by their functionality, but when starting placing the comp...
    last modified by tsvetomirasenov
  • Some concerns in Mentor Xpedition Layout

    Hi, I am a novice at using Mentor Graphics. I have some questions about Layout as follow: 1. Can anyone tell me how I can edit silkscreen designator of components in Layout. When I place a component in pcb, I cannot...
    last modified by minhducthieu2011
  • Import step file in Xpedition

    I have a step file need to import in to the Xpedition layout file. Anyone help me how to import the step file into the Xpedition layout.
    last modified by Rapport
  • Binding keys to another predefined key.

    In the following script file There are 3 lines that are giving me issues. I can successfully map to a menu item but I need 3 buttons on my mouse to map to other keys on the keyboard.   The mouse buttons 1,2,3 ar...
    created by gmdii80
  • internal unused pads and design rules

    Mornin All, Okay so I am a PADS user and an relatively new Expedition user and I have an issue with how expedition handles positive planes. In PADS I can define my planes so that I remove unused pads on internals an...
    last modified by cgoldenbus
  • Plane shape stretch option i VX1.1 like EE7.9.5

    Hi All,   Is there any option to stretch plane shape in VX.1.1 tool like EE7.9.5 (Smart utilities option) .     But in EE7.9.5 tool has one more option like stretch. Kindly suggest we have plane sha...
    last modified by senthil530
  • How to do constraint for DDR3 or DR4 designs in Xpedition Vx

    I am using DDR4 in my design with different Byte lanes. I want to know how to set constraints for DDR signals in Xpedition Vx.   1. How to create pin pair 2. How to assign different pin pairs of same net in dif...
    last modified by Rapport
  • PCB Forum 2015 – Question Log for xPCB Layout

    Q1: Is there a way to save the settings for highlighted traces and recall it as preset?  There is currently no way to do this. Your best alternative is to use the ‘Color by Net’ functionality which ca...
    last modified by Rehan_Iqbal
  • Stackup editor in hyperlinks

    Hi all,   The stackup editor in xpedition xpcb layout designer is not the same as in hyperlinks stackup editor. When I open the layout design to do post layout simulation, Hyperlinks does not open the same stack...
    last modified by ssupun90@gmail.com
  • Introducing the PCB Forums!

    PCB Forums bring Mentor customers together to learn new ways to maximize productivity and tool usage. Register to attend one of the 40+ PCB Forums worldwide   Find a PCB Forum near you
    last modified by erin_gowdy
  • How to automatically route evenly spaced traces in Expedition?

    Good morning,   Is there a method for automatically routing evenly spaced traces is in Expedition besides using multi-plow?  I have a board with varying widths across which i would like each set of traces t...
    last modified by bfiorio
  • Stretchable interconnects

    Anybody had any success of carrying out horseshoe shaped interconnects (not by exporting from AutoCad or any other CAD)? Maybe using macros or some special meandering options?
    created by vasily111