• HELP me delete my extra account.

    I'm a member of the community already (had a hard drive issue and lost all of my log in info across the board). I created a new membership and DO NOT want to use it. How I do I delete it?   Thanks,   ~Randi
    randi-o
    last modified by randi-o
  • PADS Layout 9.5 Gerber data is inconsistent with PCB design data

    PADS Layout 9.5 Gerber data is inconsistent with PCB design data   The signal hole in the PCB drawing is the L1-L3 laser hole. When the gerber is output, the L2 layer is completely covered by the ground copper,...
    zero
    last modified by zero
  • Upgrade VX2.5 upd2

    Hello Folks, I was just updating the tool from VX2.5 to VX2.5_upd2. And look who is back. I thought that this was a know bug and already dealt with. Obviously it is back.   What is going on with Quality co...
    milostnik
    created by milostnik
  • AATK poll

    What OS are you running?  We have had people ask to support Linux in AATK and I am not opposed to it, in fact the majority of the script should work in Linux.  We have issues with some of the menus and forms...
    kendall_hiles
    last modified by kendall_hiles
  • Create dynamic DRC run directory

    Hi,   I'd like to create a dynamic named DRC run directory when loading Calibre Interactive. For example, a run directory output folder with the following naming format:      <layoutviewn...
    rachel.spykerman
    last modified by rachel.spykerman
  • xDX pin number on ~PINS

    Hi there,   I am using xDX (V.X.2.4 Update 2), when placing an IC I cannot see the pin numbers only for those pin that have the active low sign. When in databook, Part View, I select the part with the assigned ...
    stempialdo
    last modified by stempialdo
  • How does your organization handle a Central Library

    We currently have a Central Library.  I have the usual partitions Resistors, Capacitors, IC, Connectors, et cetera.  We also do customer specific part partitions.  Does anyone do a central library that ...
  • Pin already connected to net

    Hi there,   I must admit that I am bit embarrassed to ask this but.. xDX won't let me connect more components to the same net. If I try to connect 3 passives on the same net in the output window an error comes ...
    stempialdo
    last modified by stempialdo
  • Use of CommaForDecimal Property

    Hello all,   I try to use the CommaForDecimal Property of the DimensionScheme Object. I get this error join in the file "error_commafordecimal.JPG" My script is the following one :   Option Explicit  ...
    barbier_g
    last modified by barbier_g
  • VX.2.3 Update 15,16 Release Notes

    Problems Fixed in X-ENTP VX.2.3 Update 16 Xpedition Layout dts0101250691 - Copper Balancing Data cause short with MVO Xpedition Designer dts0101354563 - Should not be able to remove a comp on Designer in Read only...
  • VX.2.4 Update 6~9 Release Notes

    Problems Fixed in X-ENTP VX.2.4 Update 9 EDM Library dts0101354041 - P&S - Overall performance degradation for functions in xDM Library Client (EDM Librarian) dts0101364486 - P&S - Memory is leaking on the ...
  • PluginTesting enviroment

    Which Application do you prefer to test your Capital Plugins (like CustomActions) for general?
    ton.s
    last modified by ton.s
  • Far field radiation pattern for a PCB

    Hi, I am working with a Shielding effectiveness issue and I need far field pattern for a stacked PCB. Is it possible to use Hypelynx to simulate far field pattern for such scenarios. I have Hyperlynx 9.4.1 installed ...
    dip_00
    created by dip_00
  • Best practice for drawing title block?

    Hi All,   We've been using PADS for years without changing much. Currently, we use a 2D Line drawn title block (lines set to All Layers), which shows up when we make PDFs of the CAM photos for review and documen...
    ba721
    last modified by ba721
  • THermals not connecting pins to plane

    I recently submitted a board to OshPark and the power/ground layers were not connected. I asked why and I was told that the thermals were not connected to a pad on that layer for those holes. I compared 2 boards usi...
    trayman
    last modified by trayman
  • How to distinguish between Symbol Editor and xDX in VX2.1?

    We do not want to run same Automation scripts in Symbol Editor as in xDX. Unfortunately both identify as xDX so I cannot control wether a script runs or not depending on tools purpose. Any idea?
    delinquent
    last modified by delinquent
  • Jump to  - in a hierarchical design

    Hello Folks,   there is nothing nicer than a simple hierarchical design. Lets take a look at this simple example of a repeating block with two supbages and a signal that crosses the two pages.   Lets start...
    milostnik
    last modified by milostnik
  • How to get access to local cell library within ExpeditionPCB?

    Hi all,   Can anybody explain how to get access to local cell library within PCB project in ExpeditionPCB ? I have written the following script for the opened PCB in ExpeditionPCB:   Set app = GetObject(,...
    olsmir
    last modified by olsmir
  • Understanding oasys warnings and TA messages

    Is there a document that describes the meaning of all Oasys warnings and a table listing what possible actions to take with respect to TA- messages? Also on the synthesis log, I see that oasys reports a lot of inform...
    schuler1
    last modified by schuler1
  • Ibis AMI RX receiver output port eye diagram probe

    hi michel, I have a question to your Serdes expert and need an answer ASAP. see below: I am currently simulating the attached simple channel in hyperlynx with Xilinx GTY transiever RX and TX IBIS-AMI files @ 6.144Gbps...
    roi
    last modified by roi