• PADS Layout delete all tracks in PCB connected to pads with different net name

    Is there an easy way to delete all tracks connected to pads with different net names from a PCB?
    lazyturtle
    last modified by lazyturtle
  • AC analysis

    Hi All,   When to use Gaussian pulse ? Is there any specific situation to use it. I am bit confused to selecting between pulse shapes.. I have a IBIS model for FPGA i can attach it in board sim and  can...
    shravan.sk
    last modified by shravan.sk
  • Differential Pair Skew Measurements

    Is there an easy way to measure the timing skew between the T/F lines in Hyperlynx? Is there a way to plot the average of the two signals so I can perform skew measurements?  I just want clarification so I know h...
    rjrodrig6
    last modified by rjrodrig6
  • Query method not working

    Hi,   I'm currently trying to query a schematic for a certain reference designator and then changing the model/spicefile path of the component, but (I assume) my code isn't matching the components with the refde...
    zachs1997
    last modified by zachs1997
  • Adding peripheral cfg by modifying the A2B Analyzer SDK sample application

    1. Ensure that you have slave plugins disabled. //#define APP_LINK_STATIC_SLAVE_PLUGINS #undef APP_LINK_STATIC_SLAVE_PLUGINS 2. Create the bin file using the A2B Analyzer Application (don't forget to export the peri...
    Rajesh Alwar
    last modified by Rajesh Alwar
  • What is the latest production release of the A2B Analyzer & Bus Monitor Products?

    The latest production releases, that can be downloaded from the Mentor Support Center, are: Analyzer Application Software 4.0.1 (released June 2019) Analyzer Firmware 5.1.5 (rel. May 2019) Analyzer ASIO Driver...
    Anil
    last modified by Anil
  • TOF traces matching - Via delay calculation

    Hi,   We have a design with DDR4 with address/command group splitting on 3 layers (L2, L3 and L14 on a 16 layers hdi PCB). We are ready to adjust the traces propagation delay within ±8ps.   I'm concer...
    olivierb
    created by olivierb
  • How to export a .cee file with full thermal details from Mentor Graphics Expedition to FloEDA Bridge (Flotherm XT)?

    Hi! I'm currently using FloTHERM XT to do some thermal simulations. I've successfully imported the .cee file and set all powers and thermal resistances (2Resistor Model Type) individually on the compone...
    luishenriques
    last modified by luishenriques
  • How can I tell Gerbtool 13 to query th correct license Server?

    Hi community,   I have an issue regarding Gerbtool from Mentor 2004, maybe one can help me to resolve.   An old  physical PC with Mentor WG 2005 and the Gerbtool comming with Mentor WG 2004 works well...
    markm.
    created by markm.
  • Migrate PADS Logic + Layout PCB routed to PADS Designer Integrated Flow Project

    I´m trying to migrate a PCB to PADS Desginer project. I´ll try to explain my self:   - We have copied a schematic design to PADS Designer from PADS Logic from zero, using our own component library. ...
    lazyturtle
    last modified by lazyturtle
  • What happened to my computational domain?

    I have a project which I started yesterday using Creo 4.0 and FloEFD 17.3.  I saved what I started and shut down for the night.  When I reopened today, some of my inputs are gone.  I can edit my computa...
    bradp.
    last modified by bradp.
  • Missing driver model in Generic Batch Simulation

    Dear the experts,   I use the Generic Batch simulation to run the crosstalk quick analysis for DDR4 in the board sim. I have met the issue below: I have implemented all workaround base on below link but this...
    hungreohd
    last modified by hungreohd
  • Create PDF - Visible GND Via Pads on Plane

    Hello, everybody. I have the following problem. I would like to create a PDF in Pads Layout (VX.2.5) by showing the GND Via Pads on the flooded Top Plane (and Bottom Plane). In an older version (9.4) all this still ...
    tomturbo
    last modified by tomturbo
  • Editor control window is not opening?

    Dear All,   I am trying to open editor control. But the window is not opening for me.   I am trying with Setup---> Editor control. I did'nt get any window and any other error messages. How can i get thi...
    sajivnglnice
    last modified by sajivnglnice
  • 3D PCB viewer

    We are using VX.1.1 and we don't have the 3D Layout option. If I want to view my board in 3D, I can make an IDF file. This IDF file will only show the PCB, the components (boxes) and holes in the board. Is there a ...
    Wim Creyghton
    last modified by Wim Creyghton
  • Curved trace learning ?

    Hi All,   Is there any way to plow trace curve according to the board outline shape automatically?
    nadav_azulay
    last modified by nadav_azulay
  • ECN (Engineering change details)

    I want to know how to get Engineering change content reports & all details from revision to revision.
    vishal.arora
    last modified by vishal.arora
  • Disappearing vias

    Xpedition Enterprise VX.2.4 Vias are automatically getting deleted if they are not fixed or routed to a pad.  Is there a setting to allow the vias I place to remain where I put them?  I like to sprinkle pow...
    j.stiles
    created by j.stiles
  • RAM usage in PADS Standard Plus layout

    I have a i7, 16GB RAM PC and when doing high processing tasks the computer takes lost of time to do them. After checking the task manager PADS app only uses 400MB of the 16GB. We have tested this in multple computer...
    lazyturtle
    last modified by lazyturtle
  • Linking PADS Layout PCB to PADS Designer Project

    Hi, I would like to know the best way to do the following process:   1.- We have a PADS Logic + PADS Layout project (PADSVX.2.4) 2.- We would like to create a new PADS Designer project based in PADS Logic proj...
    lazyturtle
    last modified by lazyturtle