Verify Central Library Parts Database by generating schematic and running Packager

Document created by john_dube on Oct 6, 2009Last modified by peter_festesen on Dec 3, 2019
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In order to validate the logical to physical pin mapping configuration in the Central Library parts database, it is useful to create a test schematic and run the Packager to ensure that the logic gates can be packaged into the physical package.  This  library verification script form, which is run from Library Manager, that does the following:

  • Creates a DxDesigner project, called "VerifyParts", that points to the lmc file currently open in Library Manager
  • For a selected partition, or all partitions
    • Generate a schematic that instantiates one of each symbol reference (only the .1 version) for each part number in that partition
      • the script skips parts that are flagged as "Incomplete" by Library Manager
  • Generate a top level schematic instantiates a block symbol to reference the underlying schematic
  • Runs package.exe in the background, and displays the packager output.


To run the script, invoke Library Manager, open an lmc file, click the File -> Open Script Form menu and browse to the VerifyParts.efm file.

Then select the partition, or All Partitions, and click Go.  Enjoy the show, then when DxDesigner goes away, review the packager log file in the script form.


The script runs on the Windows platform, has been tested with EE2007.5, but should work fine with newer versions.


Update 12/19/2013:

Uploaded latest version of script that allows single cell per page, and forward annotation to new pcb database

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