How to get LVS netlist parser to recognize an Inductor with 3-terminals?

Version 1

    The substrate or third pin (n3) for the inductor must be represented by $SUB=ns

     

    Spice Syntax for Inductor:
    Lxxx n1 n2 <l <tc1 <tc2>>> <SCALE=scale> <M=m> <R=r> + <parnam=pval> ... <$SUB=ns> <$[mname] | $.MODEL=mname> <$X=x> <$Y=y>

     

    Example:

    L2 n1 n2 100 200 M=4 $SUB=n3