How To Request A New FPGA Device For I/O Designer

Discussion created by dave_brady on May 15, 2010




  We strive to eliminate the need for our customers to request new FPGA device support in I/O Designer (IOD) by working closely with the FPGA Vendors to maintain up to date FPGA support.  However, the FPGA Vendors are constantly innovating creating a situation where it is possible that you might not have the FPGA device support you require in I/O Designer. To eliminate this barrier the IOD team accepts new FPGA Device support requests from our customers and aligns our efforts with your product design requirements.  Clearly, we would prefer that you check to make sure that I/O Designer does NOT have the FPGA device support you require before intiatiing a new request .


  The standard process for requesting a new FPGA Device for I/O Designer is to contact Mentor Graphics Customer Support and file a defect report.  We treat these I/O Designer New FPGA Device defect reports as customer critical (customer down) and process your request as quickly as possible without sacrificing quality.  We subject each new FPGA device we create in IOD to extensive Product and Flow testing (the last thing we want to do is send you a new device that is not high quality).



  We have been working diligently to decrease the amount of time required to process a new FPGA device request for IOD.  One of the challenges that we have encountered is that the initial request from a customer may not contain enough information to process the request which causes delays as we iteratively communicate with you to extract additional information.



In order to help accelerate the request process we have created a Word document "form" that lists all of the information we need to process your request.  The Word Document form is attached to this post for easy download.  To submit this form all you need to do is complete the form and Email it to: FPGA_PCB@mentor.com.  We will then transform your request into the proper defect report and begin processing your request.



NOTE: You will need to enable the Word Document macros for this form to use it. (Microsoft Security feature).



If you have any problems with the Word Document form please let us know.  One option is to use the Word Document as a reference and simply send us an Email message with the information requested in the form. (We are trying to make the process easier and are not going to reject requests simply because you did not use the form... we will delay starting the fulfillment process if the required information is not supplied... and we will reject the request if certain conditions are not met --- those conditions are elaborated in more detail at the beginning of the Word form).



  As a general rule the FPGA device support we supply with I/O Designer is limited to "released" FPGA devices from the FPGA Vendors. We have also begun accepting "preliminary FPGA device requests".  This is a double edged sword:



  • On one hand we understand the need to begin working      with new FPGA devices as early as possible to accelerate your product      design objectives
  • The "downside" is that the signal to pin mapping (package design) is usually the LAST aspect of a new FPGA device to be finalized => In almost every case the preliminary pinout of a new FPGA device CHANGES prior to release from the FPGA Vendor.


If you use a preliminary device with a preliminary package design and take that design all the way through PCB manufacturing there is a strong likelihood that your design will NOT work.   We strongly caution you to keep this in mind when working with Preliminary FPGA devices and to close the loop with us for a final "released" device before sending your design to manufacturing (this may also require some re-work of your FPGA and PCB design once you have the released device).



To emphasize the risk associated with preliminary devices we require that you supply the preliminary pinout of the FPGA device you are requesting. (We are attempting to encourage you to work closely with your FPGA Vendor to track the changes in the FPGA package design as it proceeds to the release phase).


If you have any questions please feel free to communicate with us directly through any of the following Email addresses: