when i'm laying out in Expedition , the multi capacitors can't get together with the report "restricted layer rule violation" what's the matter?
Just go to CES, check net classes and see which layer be disable for routing. For example, below layer1,2 and 3 be disable, then Expeditionpcb will warns “restricted layer rule violation" if you try to plow on the layer 1, 2 or 3.
if you don't have experienced collegues to ask, I strongly suggest you take a training course, that give you productivity.
thanks, you gvie me a reminds, i find the problems. i have touched the Mentor Beijng and will paticipate the courses , i think i'll have new gains .
Another great place to develop the skills and concepts needed to use Mentor's PCB tools is in our new 'On Board' community which we launched last week. CES is the first product discussed. Get On Board!
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