Hi,
In hyperlynx 8.2.1, via modeling is possbile using 3D EM solver. It is allowed if the via is connected between two layers.
If I have a via with three ports ( one to the top, 2nd one to an inner layer and 3rd one to bottom), 3D EM is not possible.
Does it mean 3D is not possible if I use a standard via ?
Please explain the reason behind this.
Hi,
3D EM modeling of the vias is usually for high speed signals running at speeds above 3GHz. Those are in general point-to-point differential topologies and I can’t see many cases where someone would want to have three ports on a via. Could you provide an example, where you need this feature?
Cristian