AnsweredAssumed Answered

ces length matching

Question asked by agxinmj on Oct 26, 2014

hai,

       I am using a ddr 3 in my design

since in it is being operated at very high speed 1866 Mt/s,to get the best performance  with a 5 ddr chips connected to an fpga i need to do layer by layer stub matching as recommended by the ddr vendor

how to set constrains such that the length from bga of ddr to fan out stub to be equal in all layers for address lines

i need the length from controller to chip 1 and from chip one to chip 2 and from chip2 to chip 3 and from chip 3 to chip 4 and from chip 4to chip 5 to be equal

is it possible to set constrain such that the length from one chip to other to be equal in all layer where ever it is routed matching should include layer stub length in it ,when routed in different layer

how to create constrain for this

u1-ddr3-1

u2-ddr3-2

u3-ddr3-3

u4-ddr3-4

u5-ddr3-5

u6-controller

address and command control group -lines

u1-termination -length -equal(top stub equal)

u2-u1-length -equal (top stub equal)

u3-u2-length-equal(top stub equal)

u4-u3-length- equal(top stub equal)

u5-u4-length -equal(top stub equal)

u6-u5-length -equal (top stub equal)

for all this when the signals routed in two different layers layer stub should get added from the layer thickness (4-8 mills)for the above layer

how to set all the data lanes to the maximum of 600 mils which should also have uniform top stub

if any one has idea on this please help me

thanks in advance for those who are helping

regards

AGXIN.J

Outcomes