1 2 Next Last 23 Replies Latest reply on Apr 6, 2017 6:47 PM by aimee Go to original post
      • 15. Re: Hyperlynx Plane  Noise Simulation
        cristian.filip

        Hi Ravi,

        Please see the link to the attached AppNote from Mentor that explains in detail how to export S-parameter Models from a board PDN.

        In regards to the second question, about the voltage source that was to compensate for an error that I made on an earlier test and it is not needed if the S-parameter is properly extracted (the VRM should be removed from the PDN during the extraction phase, so we don’t double count for it). The S-parameter model should approach 1 and contain enough data points at low frequencies to enable the simulator to extrapolate the DC value.

        Cristian

         

        http://supportnet.mentor.com/reference/appnotes/index.cfm?id=MG576008

         

        • 16. Re: Hyperlynx Plane  Noise Simulation
          potluri.ravikumar

          Hello Cristian,

           

          I thank you very much for your kind reply. Could you also please help me with one more issue.

          Based on your examples and study material I have written an IBIS file for an IO buffer "DQ_FULL_ODT50_533" using an IBIS file from Micron "u68a_at.ibs", please find it in attachments. I am not able to make it work. Could you go though "DDR2_MemCtrl_DQbus.cir" file from the attachments and give me some suggestions?. I guess that the problem lies with the ground and power clamp definitions which are not there in IBIS file from Micron?

           

          Thanks and Regards,

          Ravi

          • 17. Re: Hyperlynx Plane  Noise Simulation
            potluri.ravikumar

            Or I can already use hspice files given by Micron instead of IBIS files in this case I think?. Any further thoughts on this are highly appreciated.

             

            Thanks and Regards,

            Ravi

            • 18. Re: Hyperlynx Plane  Noise Simulation
              cristian.filip

              Hi Ravi,

               

              You need to change “Ven  enable  0  0” to “Ven  enable  0  1” as your driver is active high. Please see the modified files in attachment.

               

              Cheers,

               

              Cristian

              • 19. Re: Hyperlynx Plane  Noise Simulation
                rpotluri

                Hallo Cristian,

                 

                Thank you very much for that. I overlooked that point.

                Referring to your presentation slides on co-simulations,I think you used current mirrors to maintain same current across all data lines?

                 

                Best Regards,

                Ravi

                • 20. Re: Hyperlynx Plane  Noise Simulation
                  cristian.filip

                  Hi Ravi,

                   

                  Assuming that all the DQ topologies are almost identical, the current profile will be similar, so we can multiply the current that flows through one line by the total number of lines. This technic speeds-up the simulation without compromising the accuracy and is very useful especially if the driver models are transistor-level Spice models. If you want to include the address, command and control signals, you will need a current mirror for each topology that is different or in other words each time when the current profile changes.

                   

                  Cristian

                  • 21. Re: Hyperlynx Plane  Noise Simulation
                    rpotluri

                    Yes, exactly. My aim is to include also address and control signals into the schematic along with data signals to extract AC model for the IC pins and also do noise simulation.

                    Actually, I have "heavy point to point and T" topologies implemented for data and address buses. So I have segregated the similar DQ and Ax lines seperately based on your above comment.

                    So, in this situation I think I use current mirrors?. Do I use these current mirrors only in simulations? because there are no current mirrors on actual board?.

                     

                    Can I use Current mirror like this below?

                     

                    VDD           VDD          0          DC 1.8

                    Vo          Vo          0          DC          0

                     

                    R1          VDD          VGS1          200k

                     

                    M1          VGS1          VGS1          0          0          N_1u L=2 W=10

                    M2          Vo          VGS1          0          0          N_1u L=2 W=10

                     

                    Thankyou very much,

                    Ravi

                    • 22. Re: Hyperlynx Plane  Noise Simulation
                      cristian.filip

                      Hi Ravi,

                       

                      The voltage and current control elements are not modeling any physical component on the board, but they are used for various simulation purposes. As you see I used a couple of current- controlled current sources on my presentation (green color) just to be able to measure the currents. When you use Spice models in your LineSim schematics, the current probes get grayed out so you can’t sense the current directly. This is a workaround the limitation…

                       

                      I will let you now discover more by yourself.

                       

                      Good luck,

                       

                      Cristian

                      • 23. Re: Hyperlynx Plane  Noise Simulation
                        aimee

                        Hi Ravi,

                         

                        I'm also a student like you and I have the same trouble with you as the 'PDN _Analysis' excel lists. I want to ask you if your problems have been solved? Would you like to share the answers with me?The question of how to set up  AC model and how to choose the signal type in stimulus are my major concern. When I run ‘Distributed Analysis ’, some power pins I can't observe because its reference layer is not available. I don‘t know how to set reference net. Is there anything wrong in my PCB? My PCB has 6 layers,including two ground planes but no power plane.

                         

                        Thanks and Regards,

                        Aimee

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                        how to set signal type.JPG

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