1 Reply Latest reply on Dec 6, 2017 9:01 AM by weston_beal

    Does Hyperlynx thermal consider VIAs conductivity during thermal PCB simulation ?

    Haithem

      Hi,

       

      1)  Specific Question: I would like to check if Hyperlynx Thermal consider VIAs thermal conductivity between PCB planes and Traces during PCB thermal simulation?

       

      2)  General Question: I would like also to know if Hyperlynx Thermal simulation takes into consideration the PCB stack-up ( Prepreg and core material parameters, layer geometries, …) and provide us detailed result about dissipation behaviors, critical zones & Traces, thermal bottlenecks....?

       

      Best Regards,

      Haithem.

        • 1. Re: Does Hyperlynx thermal consider VIAs conductivity during thermal PCB simulation ?
          weston_beal

          Haithem,

           

          1) Yes, the vias are part of the thermal conductivity calculation.

           

          2) The stackup is also part of the thermal calculation. The layout information is used to determine the percentage of metal coverage in each layer in order to make a more accurate calculation. You can also specify different metal coverage percentage for areas that are significantly different than the rest of a layer.

           

          This tool is the easy-to-use version. If you need very specific thermal information on individual traces, you might need to use FloTherm. Another option that might get the detail that you need is to use HyperLynx Thermal with DC Drop. This allows DC Drop to calculate current density in exact metal layout structures with the thermal effects included. This way you can find current hot spots in power nets that are potential thermal problems.

           

          Regards,

          Weston