1 Reply Latest reply on Jan 4, 2018 3:41 PM by weston_beal

    PCIe Signal integrity simulation




      This is Arumugam and im trying to do the signal integrity analysis for high speed Ser-Des-PCIe Gen3 using hyperlynx tool.Though,I did the DDR3 SI analysis before(DDR interactive simulation wizard),this is the first time some simulation on high speed is being done.I strongly felt that the simualtion methodology is entirely different from DDR SI .

      Can you pls help where and how to start the PCIe SI analysis.


      Looking for your help in this regard.