4 Replies Latest reply on Aug 29, 2012 1:45 PM by hitheshn

    DDR2 SI with SAM9G25


      I was doing SI simulation of DQ with ATmel SAM9G25 MCU and Micron DDR2-800 memory.With the SAM9G25 set to low drive strength and slow silicon, I dont see anything at the receiver(DDR2).

      I didn't get much help from the Atmel app engineer. I don't understand why it's not able to drive. Same case with medium drive strength.


      I tried with various values of series termination resistors (0-27 ohm). But they made no difference in the above cases. But the drive from DDR2 to MCU works fine.


      TL length was 1", 50 ohm strip line. The speed was 400MHz.


      MCU ibis (LFBGA217) -



      Micron DDR2 ibis -




      One more DDR2-800 question -


      The external clock speed is 200MHZ

      Addr/Ctl/DQS signal max speed is same as clock

      Data should be simulated at clock*4, correct?

        • 1. Re: DDR2 SI with SAM9G25

          The SAM model isn't too bad, but has a couple of things that can cause problems in HyperLynx. The rising and falling waveforms include the C_fixture parameter, but has the value of 0F. Including the parameter generally causes poor calculations from the waveforms, so I recommend leaving it out whenever possible. Also, since the value is 0, it makes even more sense to leave it out. Also, the rising and falling waveforms in some of the models are too short. They don't reach the final voltage in the time allotted in the tables. If you comment out the C_fixture parameters and still have no waveform from the simulation, it would be very useful to have the FFS file that you are simulating. Sometimes the configuration of the circuit causes the problem.


          Regarding you question of clock rate, for DDR2-800, the clock rate is 400MHz, the strobe is the same. The data should be simulated with a random stimulus such as PRBS. The bit time of the stimulus pattern should be 1 / 800MHz because the data signal is latched 2 times on each strobe period. Therefore, if you stimulate the data signal with an oscillator, then the frequency would be 800MHz as you suggested.




          • 2. Re: DDR2 SI with SAM9G25

            Weston, I tried commenting out C_fixture in the ibis file and simulating. But it made no difference.

            I have attached the FFS file.

            When I select just edge, I can see the rising/falling edge. But when I select a frequency, I don't see any waveform.


            For both DDR400 (clock=200MHz) and DDR2-800 (clock=400MHz), the external Clock is half the speed ?

            • 3. Re: DDR2 SI with SAM9G25



              The main problem is still the rising and falling waveforms in the SAM model. They have some significant non-switching time at the beginning of the waveforms. You can make this a little better by selecting the menu Setup > Options > General and click the Advanced tab. Then make sure that the option Strip V-t non-switching time is checked. This helps, but there is always some limit where the bit time is shorter than the time of the transition in the rising or falling waveform. Run the simulation with an oscillator frequency low enough to allow the driver model to switch before the stimulus switches the other way.




              • 4. Re: DDR2 SI with SAM9G25

                The strip v-t option is  already checked.

                If I run the simulation oscillator freq at lower than what I want, then how would I know if the signal looks good at the desired frequency?

                Can I run at low freq and then somehow increase the freq gradually?

                I tried eye diagram. Even that looks quite horrible.