I have translated a design from Design Capture to DxDesigner, all went well and no errors.
when I package this design I get:
ERROR: Illegal physical netname '+12V,+12V_AN,+12V_AN_TR,+3V3,+48V,+48V_RETURN,+5V,+5V_AN,GND,XCMP1425,XCMP1426,XCMP1582,XCMP1583,XCMP2345,XCMP2347,XCMP2365,XCMP2366,XCMP2367,XCMP2368,XCMP2369,XCMP2370,XCMP3221,XCMP3226,XCMP3227,XCMP3228,XCMP500,XCMP834,XCMP835,XCMP857,XCMP858,XCMP859'.
Errors encountered while reading the Common Data Base.
I also can not add anything to the special components "Power" only the "Port_IN", this is probably related - any suggestions on where to go from here?
Could you open SR for this specific problem to allow Customer Support representative to look at original WG design to see why bus bundle with very long name was created during translation and what can be done to correct the schematic to allow Packager to finish successfully?
Thank you in advance.