1 of 1 people found this helpful
It's better to simulate this link in Hyplerlynx Linesim , where you have to prepare following data:
1) Board stackups for both SOC board and test card. You may hav to contact the fab for get the data or measure by doing cross-section cutoff of real board.
2) get the differpair lengths and via's sizes. You can use a free gerber viewer to get these data
3) a connector model.
Hyperlynx Boadsim doesn't support into gerber data, but Hyperlynx 3D EM(IE3D) does. If you have the stackup data,you can create the board model in IE3D and extract S paramater of differantial link, including traces and vias.
You can create the multi-board project and simulate the nets through the two boards. The gap is that you can't translate the Gerber files into .HYP files. If you go back to the layout tool data files then you should be able to translate those into .HYP files.
See what this technote says about your particular PCB layout tool.
You can start with this technote for more information on creating a multi-board project in HyperLynx.
Thanks for the reply. I did successfully model a Linesim schematic for our Multiboard design and we have been able to do the required simulations. I had one question though: We connect one board to the other using DE-50 pogo pin by IDI and they do not give any R,L and C values for the pins. They just specify the Length = 1.703", Diameter = 30mils and Resistance of 50mohms. I am currently using a transmission line with the dimensions of the pogo pin and have a resistor in series to emulate the behavior. Is this the best way to model a pogo pin? I am not sure if transmission line accurately represents the reflections caused by the pogo pin. Do you have any other suggestions? I would have liked to have a lumped circuit but the manufacturer wouldn't provide any parasitic values.
Thanks for the help.
How to open BoardSIM from Xpedition XV2.1 ?