4 Replies Latest reply on Nov 17, 2012 1:43 PM by chotansign

    Hatch Outline errors

    chotansign

      Hi, I'm a newbie in PADs. Last couple of weaks I'm trying to design a board with two layers. I have a question regarding auto routing and copper pour. I'm gonna copper pour with GND for both top and bottom layers.

       

      Which procedure will be good? Should I-

       

      1. copper pour first and go for auto routing or

      2. before going for copper pour I should do the auto rout

       

      If I do the first procedure and "Varify Design" then I'm getting errors for GND connectivity. Errors are something-

       

      Isolated subnets for: GND

       

       

      *** subnet # 1

      HATCH OUTLINE(91.24139,44.58755 L2) C14.2 C13.2

       

       

      *** subnet # 2

      HATCH OUTLINE(87.41409,49.16875 L2) U24.1 .... ..... ....etc.

       

      Errors are showing in followng pic. How can I solve the problem? Kindly let me know please.

       

      And I'm not getting any errors for second procedure after checking the "Varify Design". But I'm getting more connections and vias. I want to minimize these by using first procedure.

       

      Hatch Outline.png

      Regards,

      Chotan

        • 1. Re: Hatch Outline errors
          Mentor_JanetD

          The subnet errors are probably caused by isolated areas of copper cut off by traces.  When you are designing a two layer board and you want GND plane on both layers you need to pay special attention to routing the traces so you don't break up the GND plane.  This is best done by manual routing instead of using an autorouter.    The Router will certainly connect the nets but it won't route the traces to preserve the copper connectivity.   You can place trace keepouts in specific areas of the board to prevent the Router from placing traces there but that requires careful planning.

           

          If you don't want to route the board manually and have isolated areas of copper you can connect them to the copper on the other layer using Stitching Vias (and traces, if necessary).

          • 2. Re: Hatch Outline errors
            chotansign

            Thanks for your reply. Since I'm new in designing a board and the the autorout is the good option for me so I want to go for Stiching Vias. Can you give a brief details about stiching vias or traces? I keep digging in PADS Layout Help, but still in cloud.

             

            /Chotan

            • 3. Re: Hatch Outline errors
              Mentor_JanetD

              Stitching vias can be added to tie copper planes on multiple layers together.

              1. Set your filter to Select Nets.
              2. Select a pin that connects to the desired net.
              3. Right mouse button click and choose Add Via.
              4. You will now have a via attached to your cursor and can continue to place stitching vias down with left mouse clicks.
              5. Right mouse button click, select Cancel when complete.

               

              To select a specific through hole via type for use as a stitching via:

              1. Confirm that the desired via is allowed in the design by going to Setup > Design Rules > Routing. The via should show under the "Selected Vias" column. You may need to check the rest of the rules hierarchy as well to be sure that it is not restricted by a Net rule, etc.
              2. Before attempting to add the via type in the modeless command V and press enter.
              3. Set the radio button to "Through" and select the desired via, click OK.
              4. Select the net, right click and choose Add Via.
              5. You will now have a via attached to your cursor and can continue to place stitching vias down.
              6. Right mouse button click, select Cancel when complete.

               

              You can route traces between component pads and the stitching vias.  When connecting copper areas be sure and end the trace on a pad or via - do not stop a trace in the copper without a connection to a via or pad.  This will create an incomplete connection and you will see subnet errors in Verify Design.

              • 4. Re: Hatch Outline errors
                chotansign

                Thanks. Now the Clearance and Connectivity are showing "NO ERRORS FOUND".

                 

                I have another question. Is it mendatory to check other options for verify my design?

                 

                /Chotan