3 Replies Latest reply on Mar 10, 2016 12:43 PM by dan_liddell

    How to use *.CONNECT with hierarchical names for black-box port propagation in flat LVS?

    cgelinek
      I have an empty SUBCKT for a specific sub-cell in the netlist, featuring its port list. 
      At the top level SUBCKT, I added these ports to the .subckt line in order to compare them
      with labels I added to the layout at the black-box terminals of the sub-cell.
      The sub-cell is instantiated somewhere down the hierarchy, i.e. not in the top-level SUBCKT. I want to use *.CONNECT to create connections between the top-level ports I added and the
      ports of the instance of the empty sub-cell like this:
      *.CONNECT top_level_port inst1/sub_cell_inst/sub_cell_port I added this line inside the top-level SUBCKT. Therefore, the full path of the sub-cell
      would be top/inst1/sub_cell_inst. I also tried to *.CONNECT the nets inside inst1 which connect to the sub_cell_inst, like so:
      *.CONNECT top_level_port inst1/net_to_sub_cell_port All these attempts failed, the LVS report keeps showing mis-matching instances like this: output: top_level_port          ** top_level_port ** ** no similar net **            output: inst1/net_to_sub_cell_port Note that I have the LVS SPICE CULL PRIMITIVE SUBCIRCUITS yes line in my SVRF in order to prevent sub_cell being treated as a primitive cell.

       

      Any ideas on why Calibre ignores the *.CONNECT lines? Any pointers would be appreciated.

        • 1. Re: How to use *.CONNECT with hierarchical names for black-box port propagation in flat LVS?
          dan_liddell

          Remember, your netlist is not flat as an input. So any *.CONNECT that you place into a hierarchical netlist should not assume flattened net names. If you run the tool flat, the tool will handle flattening it for you, and if all goes according to plan, it will just "do the right thing."

           

          Using *.CONNECT or *.J in the global scope of the netlist causes this behavior:

           

          "The *.CONNECT and *.J statements that appear in a SPICE netlist outside of subcircuit definitions apply to global nets anywhere in the netlist and to non-global nets in the top-level subcircuit."

           

          So if you say this in the global scope:

           

          *.CONNECT top_level_port inst1/sub_cell_inst/sub_cell_port

           

          the second net is not in the top-level subcircuit.

           

          If you put the *.J inside the scope of a subcircuit, then this applies:

           

          "The *.CONNECT and *.J statements that appear in a SPICE netlist inside of a subcircuit definition apply to all global nets, but they do not apply to non-global nets outside of the subcircuit definition in which these statements occur."

           

          Assuming top_level_port is a global net, you can say this in the scope of a subcircuit:

           

          .SUB block

          *.J top_level_port net_to_sub_cell_port

          ...

          .ENDS

           

          Here is some relevant information:

           

          "This control statement can appear at any level of hierarchy; shorts propagate up the hierarchy through subcircuit pins as necessary (these are called deep shorts). Shorts propagate in both hierarchical and flat execution. When LVS reports information about a shorted net, as in a discrepancy, it uses the name of one of the original nets. The choice is arbitrary, but there is preference in the following order: power and ground names, global nets, user-given names, and subcircuit pin names."

           

          Note this says the shorts propagate up the hierarchy, but nothing is said about down the hierarchy.

           

          Hope that helps,

           

          dan

          • 2. Re: How to use *.CONNECT with hierarchical names for black-box port propagation in flat LVS?
            cgelinek

            Thanks Dan for your answer.

             

            I have some more points/questions:

             

            1. I don't use global nets. Every net is local to a SUBCKT, the same applies to the top_level_port.
            2. As I said, my *.CONNECT lines are inside the top-level SUBCKT.
            3. I understand that the netlist is still hierarchical, even though the layout is flat. That is why my *.CONNECT lines have slashes in them, to go through the hierarchy in order to connect to the signal inst1/sub_cell_inst/sub_cell_port. In this case, the top-level SUB has an instance inst1, which in turn has another instance sub_cell_inst, which has a port sub_cell_port, which connects to the net net_to_sub_cell_port inside inst1.
            4. I need to find a way to let Calibre consider the sub_cell_port of sub_cell_inst inside inst1 to be connected to the top_level_port of my top-level SUBCKT for LVS.

            dan_liddell wrote:

            Note this says the shorts propagate up the hierarchy, but nothing is said about down the hierarchy.

            That is definitely an interesting point. Would this imply that you can't use *.CONNECT to connect two nets in different levels of hierarchy? I doubt it, first because I think this is an important feature and second because I think what they meant is that if you have a down the hierarchy in which a *.CONNECT is used to connect two ports which are separate nets in the instantiating SUBCKT, it will (naturally) short those two (seemingly separate nets) up in the hierarchy as well.

             

            .SUB cell1 a b
            *.CONNECT a b
            .ENDS
            
            .SUB top_level c d
            xinst1 c d cell1
            .ENDS
            

             

            In my opinion, what that means that in the sample above, in the top_level SUBCKT nets c and d are shorted because of the *.CONNECT in cell1.

             

            To clarify what I need to do, here follows the example I was talking about:

             

            .SUB sub_cell sub_cell_port
            .ENDS
            
            .SUB cell1
            xsub_cell_inst net_to_sub_cell_port sub_cell
            * other instances/primitives
            .ENDS
            
            .SUB top_level top_level_port
            xinst1 cell1
            * other instances/primitives
            .ENDS
            

             

            My question: how should a *.CONNECT look like and where should it be located in order to connect top_level_port to sub_cell_port?

            What I tried so far is to put

            *.CONNECT top_level_port inst1/sub_cell_inst/sub_cell_port

            or

            *.CONNECT top_level_port inst1/net_to_sub_cell_port

            inside the top_level SUB (just before or just after the xinst1 line).

            • 3. Re: How to use *.CONNECT with hierarchical names for black-box port propagation in flat LVS?
              dan_liddell

              Please see below.

               

              dan

               

               

              Thanks Dan for your answer.

               

              >>> You’re welcome.

               

              I have some more points/questions:

               

               

               

              1.     I don't use global nets. Every net is local to a SUBCKT, the same applies to the top_level_port.

               

              >>>To make this work, your top-level net should be declared as a global.

               

              2.     As I said, my *.CONNECT lines are inside the top-level SUBCKT.

               

              >>> Flattened net names do not exist at the level of the subcircuit in which you are placing the *.CONNECT.

               

              >>> Another way to say this is, *.CONNECT does not figure out flattened net paths and make the connections accordingly. It simply looks at the net name, like “inst1/sub_cell_inst/sub_cell_port” and tries to make a connection to that net in the scope of the subcircuit where the *.CONNECT occurs. But no such net exists in your design by that name at that level of the hierarchy. So no connection occurs.

               

              I understand that the netlist is still hierarchical, even though the layout is flat. That is why my *.CONNECT lines have slashes in them, to go through the hierarchy in order to connect to the signal inst1/sub_cell_inst/sub_cell_port. In this case, the top-level SUB has an instance inst1, which in turn has another instance sub_cell_inst, which has a port sub_cell_port, which connects to the net net_to_sub_cell_port inside inst1.

               

              >>> Your source cannot have flattened net names for the reason stated above. Declare the nets in hierarchical fashion and just let the tool figure out the matches to the corresponding flattened nets in the layout.

               

              3.     I need to find a way to let Calibre consider the sub_cell_port of sub_cell_inst inside inst1 to be connected to the top_level_port of my top-level SUBCKT for LVS.

               

              dan_liddell wrote:

               

              Note this says the shorts propagate up the hierarchy, but nothing is said about down the hierarchy.

               

              That is definitely an interesting point. Would this imply that you can't use *.CONNECT to connect two nets in different levels of hierarchy?

               

              >>> No, it means you have to connect the nets from the bottom-up, not the top-down. So you have to place the *.CONNECT within the lower-level block where you want the deep short to occur, using a local net and a top-level port name declared as a global.

               

               

               

              I doubt it, first because I think this is an important feature and second because I think what they meant is that if you have a down the hierarchy in which a *.CONNECT is used to connect two ports which are separate nets in the instantiating SUBCKT, it will (naturally) short those two (seemingly separate nets) up in the hierarchy as well.

               

               

               

              .SUB cell1 a b
              *.CONNECT a b
              .ENDS
               
              .SUB top_level c d
              xinst1 c d cell1
              .ENDS

               

               

               

              In my opinion, what that means that in the sample above, in the top_level SUBCKT nets c and d are shorted because of the *.CONNECT in cell1.

               

              >>> You have shorted nets within the scope of cell1 and that will apply going up the hierarchy. But you cannot accomplish the same thing by going down the hierarchy from the top level, like this:

               

              .SUB top_level c d
              *.CONNECT inst1/a inst1/b  $$ this is incorrect because these nets don’t exist here.
              xinst1 c d cell1
              .ENDS

               

              To clarify what I need to do, here follows the example I was talking about:

               

              $$ note the following subcircuit

               

              .SUB sub_cell sub_cell_port
              *.J top_level_port sub_cell_port    $$ make the connection going up the hierarchy to the global net
              .ENDS
               
              .SUB cell1
              xsub_cell_inst net_to_sub_cell_port sub_cell
              * other instances/primitives
              .ENDS
              $$ add this
              .global top_level_port
              .SUB top_level top_level_port
              xinst1 cell1
              * other instances/primitives
              .ENDS
               

               

               

               

              My question: how should a *.CONNECT look like and where should it be located in order to connect top_level_port to sub_cell_port?

               

               

               

              >>> Please try the *.J statement in sub_cell above together with the .global declaration.