1 2 First Previous 17 Replies Latest reply on May 14, 2017 8:41 AM by vlsi.mayank

    LVS, PEX, PEX_RUN environment variable issue

    bey

      I am trying to run a simulation on an extracted view of my APR design. The design passes LVS when I set PEX_RUN = FALSE. However, when I set PEX_RUN = TRUE, LVS fails (PEX does complete and create a calibre view). Because of this I am not able probe any internal nets in my design while simulating.

       

      What I noticed is when PEX_RUN = FALSE, the fets in my layout are netlisted as "nfeti" (the same as in the schematic). When PEX_RUN = TRUE, the fets in my layout are netlisted as "nfeti4" (not the same as in the schematic).

       

      Does anyone have an idea of how I can fix this issue? Thanks.

        • 1. Re: LVS, PEX, PEX_RUN environment variable issue
          chris_balcom

          If the LVS is failing because of "seed promotion" issues then this TechNote may help:

           

          http://supportnet.mentor.com/reference/technotes/public/technote.cfm?id=MG17585

           

          Seed promotion can appear as missing devices in lower level cells, at the same time you see extra devices in higher level cells.

          • 2. Re: LVS, PEX, PEX_RUN environment variable issue
            bey

            Thanks for the quick reply, Chris. I tried adding the "LVS Push Devices SEPARATE PROPERTIES YES" statement to my list of included SVRF Commands. I'm still encountering the same problem after running LVS though.

            • 3. Re: LVS, PEX, PEX_RUN environment variable issue
              chris_balcom

              I'm interested to know what sort of errors are causing the LVS to be incorrect. Have you been able to see any clues in the LVS report?

              • 4. Re: LVS, PEX, PEX_RUN environment variable issue
                bey

                I haven't noticed anything particularly helpful. Here is the summary of the mismatches. Let me know if I can provide any other information.

                 

                INITIAL NUMBERS OF OBJECTS

                --------------------------

                 

                 

                                Layout    Source         Component Type

                                ------    ------         --------------

                Ports:            368       368

                 

                 

                Nets:           13680     13680

                 

                 

                Instances:        354         9    *    D (2 pins)

                                     0     14260    *    nfeti (6 pins)

                                 16285         0    *    nfeti4 (4 pins)

                                     0     14248    *    pfeti (5 pins)

                                 15964         0    *    pfeti4 (4 pins)

                                ------    ------

                Total Inst:     32603     28517

                 

                 

                 

                 

                NUMBERS OF OBJECTS AFTER TRANSFORMATION

                ---------------------------------------

                 

                 

                                Layout    Source         Component Type

                                ------    ------         --------------

                Ports:            368       368

                 

                 

                Nets:           13680     13680

                 

                 

                Instances:          9         9         D (2 pins)

                                     0     13387    *    nfeti (6 pins)

                                 16285         0    *    nfeti4 (4 pins)

                                     0     12669    *    pfeti (5 pins)

                                 15964         0    *    pfeti4 (4 pins)

                                ------    ------

                Total Inst:     32258     26065

                 

                 

                 

                 

                       * = Number of objects in layout different from number in source.

                • 5. Re: LVS, PEX, PEX_RUN environment variable issue
                  chris_balcom

                  I agree, that doesn't look like a seed promotion problem at all.

                   

                  It looks to me as if the PEX run causes the layout devices to be perceived as "nfeti4" while the schematic seems to be using "nfeti".

                   

                  I'm not familiar with this flow but maybe those device model names will sound familiar to someone else that can help?

                  • 6. Re: LVS, PEX, PEX_RUN environment variable issue
                    bey

                    I've never run into this issue before. I guess I should ask the people that provided me with the standard cells if they know how to fix this issue? I'm not sure if this makes a difference, but these are isolated fets. Is there something different I need to do for fets that are in a deep nwell when running LVS and PEX?

                    • 7. Re: LVS, PEX, PEX_RUN environment variable issue
                      chris_balcom

                      For the PEX run the layout devices are recognized with 4 pins while the source shows 5. Maybe the layout pins are source, drain, gate, and one substrate pin? Maybe the source device pins are source, drain, gate and two substrate pins?

                       

                      When the LVS was correct, did the layout devices have 5 pins, or did the source devices have 4 pins?

                      • 8. Re: LVS, PEX, PEX_RUN environment variable issue
                        bey

                        The layout had 5 pins.

                         

                        INITIAL NUMBERS OF OBJECTS

                        --------------------------

                         

                         

                                        Layout    Source         Component Type

                                        ------    ------         --------------

                        Ports:            368       368

                         

                         

                        Nets:           13680     13680

                         

                         

                        Instances:         21         9    *    D (2 pins)

                                         16285     14260    *    nfeti (6 pins)

                                         15964     14248    *    pfeti (5 pins)

                                        ------    ------

                        Total Inst:     32270     28517

                         

                         

                         

                         

                        NUMBERS OF OBJECTS AFTER TRANSFORMATION

                        ---------------------------------------

                         

                         

                                        Layout    Source         Component Type

                                        ------    ------         --------------

                        Ports:            368       368

                         

                         

                        Nets:           13680     13680

                         

                         

                        Instances:          9         9         D (2 pins)

                                         13387     13387         nfeti (6 pins)

                                         12669     12669         pfeti (5 pins)

                                        ------    ------

                        Total Inst:     26065     26065

                         

                         

                         

                         

                               * = Number of objects in layout different from number in source.

                        • 9. Re: LVS, PEX, PEX_RUN environment variable issue
                          chris_balcom

                          Indeed the schematic stayed the same for both LVS and PEX runs, while the layout was extracted differently. For both the N and P devices, fewer pins were recognized in the layout during the PEX run than during the LVS run. I'm not sure why that is happening but hopefully someone else will know.

                          • 10. Re: LVS, PEX, PEX_RUN environment variable issue
                            bey

                            Looking at the RVE, I noticed that the missing pins are sx and DN.

                            • 11. Re: LVS, PEX, PEX_RUN environment variable issue
                              chris_balcom

                              Since the layout devices are recognized differently during the LVS for a PEX run, is it possible that the source schematic or netlist is supposed to be different for the LVS/PEX run too?

                              • 12. Re: LVS, PEX, PEX_RUN environment variable issue
                                bey

                                I tried using the following commands:

                                 

                                # to change the devices in the schematic from nfeti/pfeti to nfeti4/pfeti4

                                LVS MAP DEVICE nfeti nfeti4 SOURCE

                                LVS MAP DEVICE pfeti pfeti4 SOURCE

                                 

                                # to change from 6(5) pin (nfeti/pfeti) to 4 pin (nfeti4/pfeti4)

                                LVS DISCARD PINS BY DEVICE YES

                                 

                                This got rid of my incorrect instance discrepancies. However, I still get incorrect net discrepancies.

                                • 13. Re: LVS, PEX, PEX_RUN environment variable issue
                                  bey

                                  If I don't include the LVS DISCARD PINS BY DEVICE statement, I get the following results:

                                   

                                  What does this mean?

                                  nfeti4 (4 pins): (d s) g b

                                  nfeti4 (6 pins): d g s b dn sx

                                   

                                  ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

                                  INITIAL NUMBERS OF OBJECTS

                                  --------------------------

                                   

                                   

                                                  Layout    Source         Component Type

                                                  ------    ------         --------------

                                  Nets:           13680     13680

                                   

                                   

                                  Instances:        409         9    *    D (2 pins)

                                                   16285         0    *    nfeti4 (4 pins): (d s) g b

                                                       0     14260    *    nfeti4 (6 pins): d g s b dn sx

                                                   15964         0    *    pfeti4 (4 pins): (d s) g b

                                                       0     14248    *    pfeti4 (5 pins): d g s b sx

                                                  ------    ------

                                  Total Inst:     32658     28517

                                   

                                   

                                   

                                   

                                  NUMBERS OF OBJECTS AFTER TRANSFORMATION

                                  ---------------------------------------

                                   

                                   

                                                  Layout    Source         Component Type

                                                  ------    ------         --------------

                                  Nets:           13680     13680

                                   

                                   

                                  Instances:          9         9         D (2 pins)

                                                   16285         0    *    nfeti4 (4 pins): (d s) g b

                                                       0     14260    *    nfeti4 (6 pins): d g s b dn sx

                                                   15964         0    *    pfeti4 (4 pins): (d s) g b

                                                       0     14248    *    pfeti4 (5 pins): d g s b sx

                                                  ------    ------

                                  Total Inst:     32258     28517

                                  • 14. Re: LVS, PEX, PEX_RUN environment variable issue
                                    Govind_kulkarni

                                    Bey,

                                    I remember few process has different symbolic view(they will have more  pins, like pwell pin) for the device inside the DEEP NWELL, by looking  at the report it seems like the LVS is not recognizing the DEEP NWELL layer.

                                    --

                                    Regards,
                                    Govind Kulkarni   
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