Hi all, currently using PADS Layout & Logic 9.4.1 and still do not see a solution to this problem/question. This problem/question lies on the manufacturability/ SMD Assembly side of the PCB world. It's not a problem that will show itself in the netlist or electrical correctness of the circuit.
I see in Design Rules, Clearance, in the Clearance Matrix there is a SMD to SMD rule the user can specify. That rule is relevent for different net SMD to SMD clearance rules. But what about same net SMD to SMD clearance? Hmmmm, you ask why would anyone care about that? Well as I hinted above this concern is not explicitly speaking a problem electrically for the circuit to function properly but a manufacturability/SMD assembly problem. If SMD pads of adjacent devices are too close together there will be either no solder mask web between them, or a mask web so thin that solder paste will wick under the mask web anyway, when the web is over Copper. We have seen in our own in house SMD assembly process that any solder mask web less than .004"-.005" will not prevent solder paste migration, again when the web is over Copper.
So, if you have SMD pads of adjacent devices that are that close, or even up to .010" apart (the PCB FAB house is going to grow those solder mask openings to allow for relatively poor solder mask registration leaving the PCB with maybe only a .005" web) and those SMD pads are in a Copper plane/pour they are effectively going to be one SMD pad. Again, not a problem electrically but all kinds of bad things can happen on the SMD assembly line. Components could start to float/drift out of position, tombstoning, a larger component could steal all of the solder from a smaller one, take your pick of problems. Of course AOI will catch these problems but if you are waiting for AOI to catch your problems you've already committed the mistake to a fabricated PCB and signed up for expensive hand solder rework AND another spin of your PCB. Better to catch it up front right?
A new rule in the Design Rules, Clearance, Same Net Matrix for SMD to SMD would catch this type of problem right?
Is there some specific reason Mentor has seen fit to not include this Design Rule?
Is there some aspect to Decal design that I am not familiar with that can effectively prevent this, and/or allow existing design rules to flag this type of problem?
The attached picture shows just such a problem between L4 and (C81 & C82).
thin_mask_web.jpg 36.5 KB