1 Reply Latest reply on Feb 6, 2013 8:43 AM by chris_balcom

    Doubt on LVS BOX

    ashith.kuniyil

      Hi ,

       

      LVS BOX Specifies black box cells in hierarchical circuit extraction (calibre -spice) as well as flat and hierarchical circuit comparison. . .

       

      actually i need to be delete some cells from layout as well as netlist but their pins should be extracted . . . do anyone can help me

       

       

      Thanking You ,

       

      Ashith K

        • 1. Re: Doubt on LVS BOX
          chris_balcom

          Hi Ashith,

           

          LVS BOX should theoretically allow you to ignore certain cells and subckts in various ways during connectivity extraction and LVS comparison. To create the pins on the layout cell, the contents of the layout boxed cells are considered (so the pins can be determined) and then during comparison the devices are supposed to be ignored.

           

          What is happening in the case you see, that causes it to look like LVS BOX isn't doing what you want?

           

          Best regards,

          -chris