4 Replies Latest reply on Feb 14, 2013 12:32 PM by hstoiber

    LVS question how to flag floating "island" of MOS devices in the layout

    hstoiber

      Hello.  Have anyone encountered a situation where the schematic has an unintented error where the source of PMOS devices was tied to a non-port supply power net name and the source of the NMOS devices was tied to a non-port supply ground net name, and thus, the layout followed the schematic and passed LVS, however, since the supply power and ground nets in the layout though were hooked up to the MOS devices, were actually floating inside the layout and not hooked up to the supply power and ground pins and thus eventually not hooked up to any IO pads in the layout which eventually resulted a non working chip since these devices were actually not driven by any supply nets?

       

      Beside, PERC and ERC, is there anyway to make this LVS not clean?  Is there anyway to make LVS failed if the MOS devices are not driven by supply net names?

       

      Thanks.

       

      -Hazel Stoiber

        • 1. Re: LVS question how to flag floating "island" of MOS devices in the layout
          chris_balcom

          Hi Hazel,

           

          I agree, the main purpose of LVS is to make sure the layout matches the source, so the source must be trusted (from pure LVS or Layout Vs Schematic standpoint).

           

          So, if pure LVS standpoint is out... I think that leaves PERC and ERC... and they are designed to catch this sort of thing... so trying to catch this kind of problem without using ERC or PERC seems too restrictive to me.

           

          I can think of one thing that we can leverage during connectivity extraction to cause LVS to abort without comparing (LVS ABORT ON SUPPLY ERROR) but those kinds of errors relate to “conflicts” usually, or missing connections to the substrate, which don’t seem to be at issue in this case.

           

          Another possibility to consider is LVS ABORT ON ERC ERROR but that goes back to ERC that maybe you already knew about.

           

          This kind of problem really seems to relate directly to “PATHCHK” in my opinion, which again is ERC style of checking more than LVS.

           

          I wonder if anybody else has ideas on this?

           

          Best regards,

          -chris

          • 2. Re: LVS question how to flag floating "island" of MOS devices in the layout
            kyanda

            Just have to ask...were these virtual ports or just floating nets that matched LVS and were never connected on the next level of hierarchy by the DE?

             

            For the former case this should be flagged as an ERC error.

             

            In a case like the latter you cannot totally rely on tools to find the problem. A layout designer should be alert for mistakes and go ask the engineer if this was his or her intention.

            • 3. Re: LVS question how to flag floating "island" of MOS devices in the layout
              hstoiber

              Thank you Chris for your reply and all you share are true.  I am still hoping Mentor can have "add on" feature to identify "island of gates/transistors with floating supply nets".  My biggest concern is schematic is not clean, PERC nor ERC were run but designers might ignore looking into all the errors flagged due to too many false errors syndrome and not fluent in using the PERC and ERC tools.  If LVS failed with "X", designer tended to pay more attention.

               

              We have solved the problem for the short-term in the past 2 days from Cadence schematic flow point of view.  Better to be correct than sorry at the silicon.

               

              -Hazel

              • 4. Re: LVS question how to flag floating "island" of MOS devices in the layout
                hstoiber

                Hello  Kyanda,

                 

                Thanks for your reply.  Please see my previous reply to Chris.  Hopefully, Mentor can add this request for future development.

                 

                -Hazel