I have an Orcad schematic (.dsn). The schematic is of a microcontroller with extensive use of buses and net aliases. I am finding that DxDesigner is not able to translate the net alias.
For example, if the net in Orcad has been defined as FPGA_IO_1 and aliased using ADIO_2, it shows up in DxDesigner as just FPGA_IO_1. The net aliasing is moved under the property name called ALIAS and its value is FPGA_IO_1ADIO_2. ALIAS appears as a property of the net. I don't think ALIAS is a standard DxDesigner property and it is originating from the conversion process.
To fix this, I am currently manually selecting the net and changing its name to FPGA_IO_1|ADIO_2 which seems like DxDesigner's way of doing net aliases. Is there a better way? Is there some way I can translate the Orcad schematic such that the net alias is done correctly?