Hi,

Please find the attached file.

1. You can see 5ps and 18ps. What are those values and how is it calculated?

2. What is this 27Ohms? Does it mean the via impedance?

Please clarify

Hi,

Please find the attached file.

1. You can see 5ps and 18ps. What are those values and how is it calculated?

2. What is this 27Ohms? Does it mean the via impedance?

Please clarify

Here is what I get after looking at your example.

The Zo of 51 and 48 ohms are due to the transmission lines connecting to the via on those layers.

The 20fF and 41fF capacitance values to GND seem to represent the amount of capacitance of the via pad to the reference plane. On the top layer (20fF), the pad creates 20fF worth of capacitance to the nearest reference plane (GND simply meaning a plane and not necessarily a GND plane)

The 41fF created on layer 5 must be created from multiple reference planes, essentially doubling the capacitance created between the pad and the planes.

**My example:**The 27 Ohm transmission line represents the via impedance based on the inner/outer diameter and the delay must be related to the length of the via barrel.

I did a simple experiment much like your example where I have a signal layer on top, layer 3, and bottom. The top and bottom traces are microstrips with one reference plane immediately adjacent, and layer 3 is a symmetrical stripline with reference planes on layer 2 and 4.

89 Ohms connects the top and bottom transmission lines, Layer 3 has a Zo of 81 Ohms.

16fF on top and bottom represent the pad capacitance, 33fF represents the pad capacitance due to multiple reference planes. Because it is a symmetrical stripline, both the reference plane/pad areas are contributed equally effectively doubling the capacitance (16fF x 2 = 32fF - HyperLynx is probably rounding).

The transmission line representation of the via barrel L/C is 70 Ohms with a TD of 6ps per segment (12ps total)

Using two simple formulas (Co = TD/Zo and Lo = TD*Zo) the L/C can be calculated. In my case (171.42 fF and 840pH). TD = Square root (L*C) = 12ps

If you were to change the via diameter but leave the via pad alone, the Zo and TD of the via (transmission line on the via viewer) would change. If you changed the pad size, but left the via diameter alone,

**both**the transmission line Zo and pad capacitance would change.Changing the stackup thicknesses/er/ overall board thickness will also affect these parameters.

Hope this helps!

I am working on figuring this out as well. I have been working through my own example. I will post my results later.