If I understand correctly, what you are indicating is that you allow silkscreen to be on via pads and are not concerned when via holes are present where silkscreen intersects. The reason you are not concerned is that all the vias are going to be tented closed with soldermask from both sides.
In the ODB++ product model used for analysis, the soldermask openings are represented by pads of the same size as the associated drill. The instructions you must be giving to the fabricator is to tent vias, which would result in the fabricator deleting these pads from the soldermask layer prior to creating the soldermask artwork.
If I have all of the above correct, then inside the ERF Manager you should set the ranges ss2pad_via and ss2via to a blue or "Report None". You also might consider removing these pads yourself before providing the ODB++ product model to your fabricator. This can be done easily with Valor NPI and repeatably by using the Product Modeling Interface and implemented through the Design Process Wizard to be completely automatic.
Let me know if I have not answered your question.
Thanks for the answer, all of your assumptions are correct, we use a lot of different manufactures as we are a design house and we have found it better to let them decide on the process that they want to use tent or not, so we leave them there. We not have the ERF manager so I have to set these in the old way in an ASCII file so how would I change theses settings.
ss2pad_via = -1,-1,0 .o -1
ss2via = -1,-1,0 .o -1
These are from an old Valor Enterprise ERF.
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