If you really want to ignore the macro completely you could use the following statement in your rule file:
EXCLUDE CELL mycellname
It takes effect during the connectivity extraction phase of LVS.
Thank you Chris. it worked.
A couple of doubts.
* Is BOX and EXCLUDE options mutually exclusive?
* If we specify some cells in EXCLUDE, is it really required to use LVS FILTER <mycellname> OPEN to those cells?
I think the answer depends on the specific situation. EXCLUDE CELL and LVS BOX and LVS FILTER can be applied separately to the layout and the source and they may be needed in different ways depending on what must be accomplished. Here are some tips that may help:
* The EXCLUDE CELL works only during connectivity extraction and it causes the cell to be completely ignored during input of a graphical layout database. This is more severe than using LVS BOX. There won't be any pins from the cell, no placements of it either.
* LVS BOX can be used during connectivity extraction such as calibre -spice. It can also be used during LVS comparison. It can also be used duriong both. It can be used just for the layout or just for the source and can also be used for both.
* LVS FILTER is used during LVS comparison only, and can be used for the source or layout or both.
With all those possible combinations in mind, we can usually combine them to get the desired effect depending on the problem we're trying to solve. To answer your questions...
Q: Is BOX and EXCLUDE options mutually exclusive?
A: Depends on the situation. EXCLUDE removes it from graphical layout, so BOX wouldn't be effective afterward. If just doing comparison then EXCLUDE isn't applied so BOX may be helpful depending on what needs to be accomplished.
Q: If we specify some cells in EXCLUDE, is it really required to use LVS FILTER <mycellname> OPEN to those cells?
A: Depending on the situation, for instance EXCLUDE will remove it from the layout database so if it exists in the source netlist then LVS FILTER would be needed to get the same effect for the source. BOXing the source doesn't really remove it completely but rather just ignores the contents while leaving a higher level "boxed" representation. In some cases you might need to use LVS BOX for the source netlist subcircuit (so that it is treated like a primitive subckt) and also simultaneously using LVS FILTER so that subckt can then be removed. LVS FILTER only works on devices and primitives so the LVS BOX can be helpful in conjunction.
Actually my results are as mentioned below.
Layout Source Component Type
------ ------ --------------
Ports: 2 227 *
Nets: 7811901 39914967 *
Instances: 19902095 63479962 * MN (4 pins)
19955702 34133620 * MP (4 pins)
0 65 * Q (3 pins)
0 94 * R (2 pins)
0 7 * rm1w (2 pins)
0 27 * rm2w (2 pins)
0 1 * rm5w (2 pins)
0 45 * rnpolywo (2 pins)
0 138 * rnpolywo_m (3 pins)
0 10 * rpodwo (2 pins)
0 1063 * rppolywo (2 pins)
0 155 * rppolywo_m (3 pins)
4431 0 * D (2 pins): p n
0 18610 * D (2 pins): p n
0 391 * crtmom_2t (2 pins)
0 1980 * nmoscap_25 (2 pins)
Total Inst: 39862228 97636168
The source devices which are mismatched are all in the excluded box and hence the layout has 0 devices. But as far as i understand, the devices are shown at the source because i am not able to exclude those devices from the netlist. How can i avoid these devices from the source?
This may be very basic questions but since i am using calibre for the first time, i am not able to understand the flow/process in depth.
LVS FILTER statements in the rule file, should cause those source netlist devices to be ignored during the LVS run.