4 Replies Latest reply on Jul 10, 2013 10:23 PM by kabaleeswaran.K.R

    Via stiching generate via outside PCB



      I have following problem. When I am using stiching via command I observe that one via is generated outside PCB. Please see at attached picture.Via has marked Plane Thermal property. It can be checked using Verify Design=> Connectivity. It is very frustraiting because when I try to remove this via Fatal Error occurs. Presence via it's not the biggest issue. The biggest issue is when I trying to flood plane some pins from the same net as via outside board are not connected by plane. Export and import command doesn't solve the problem. Do you know what can be the root cause. I am using PADS 9.5.


      Best regards


        • 1. Re: Via stiching generate via outside PCB

          It sounds like there may be some corruption in that net.  Exporting to ASCII may not report certain kinds of net problems.   If you have support please submit a new Service Request with a current copy of the .pcb file.   If you don't have support, backup the file and put a copy in a safe place.  Then run Integrity Check - Type I (eye), return on the keyboard.  Any errors will appear in a popup box.  If there are no errors it will say so in the lower left corner of the Layout window.  If errors are reported click Repair All.  This may fix the errors or may sometimes delete part or all of a net.  This is why a backup file is so important.  If anything is deleted, do a compare to the netlist to see what is missing and replace it, either manually or via ECO.

          • 2. Re: Via stiching generate via outside PCB

            That's very odd.  I've never seen that in 9.3 or earlier.  Your photo is unclear; are you getting a stitching via that is about (4x,10x) off your PCB?  How is your board outline defined (i.e. what shape)?


            This might be a good case for a service request.

            • 3. Re: Via stiching generate via outside PCB



              I don't have valid support I tried in way you described.In that case during integrity check I receive information Fatal Data Base Error Number 2015 and only thing I can do is to click OK in the popup window.

              But I had such problems before and in one project Integrity Check adn Repair   All partially helps. Vias from corrupted net has been removed. I will  check in two other and let you know.



              Yes my via is few times off my PCB. In PADS Router I can edit this via (in original file) even delete and return to PADS Layout but problem with corrupted net information still occurs.

              Board is defined as rectangle.

              • 4. Re: Via stiching generate via outside PCB


                First find the via and delete it after that export the nellist from this board after that open new board and then import the netlist,after that press i you would not get any problem now