I have following problem. When I am using stiching via command I observe that one via is generated outside PCB. Please see at attached picture.Via has marked Plane Thermal property. It can be checked using Verify Design=> Connectivity. It is very frustraiting because when I try to remove this via Fatal Error occurs. Presence via it's not the biggest issue. The biggest issue is when I trying to flood plane some pins from the same net as via outside board are not connected by plane. Export and import command doesn't solve the problem. Do you know what can be the root cause. I am using PADS 9.5.