can any one help me please...??
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Since the ODT values are selected within the device, corresponding IBIS files contain all possible models. To use the ODT models, select appropriate model in "ODT Models" page in the Hyperlynx DDRx wizard.
To know which model is good in your case, refer to the data sheet. When I searched online, I found that Device data sheets list what ODT values to use in a tabular format (With respect to the number of slots and Ranks). Since you are using Micron models, below mentioned document might be a good place to start (refer to pages #11 and #12):
Thank you for replying..
Actually in datasheet and also in IBIS model file, the possible ODT values are given, but i am confused which one to use in my case..
I will definately check the attached document.
Thanks & Regards,
HyperLynx LineSim has some powerful editng and sweeping features that can help you to quickly choose things line line length, number of vias, and ODT settings. You don't have to guess about the ODT choice. You can run what-if simulations and sweep things like model settings, stackup, and line lengths. You can choose the ODT that fits your circuit by the simulation results for timing and signal integrity. You can find what kind of margins you have based on differnt settings. The DDR Wizard will also let you quickly choose the ODT by looking at the batch results for timing and signal integrity.
I think first we have to choose any DQ signal and then for that signal we have to apply various model buffers and then
go for sweep analysis see the waveform & decide?
Can we do it wiyhout selecting any signal ?
"can u please guide me how to decide(on what parameters) the ODT value for the DDR3."
The ODT values will be selected based on the operations your perform at the DRAM side (idle or write to DRAM) or Read
During write termination will be enabled at the DDR side and Disabled at controller side
During Read termination will be enabled at the controller side and Disabled at DDR side
can you please provide inputs on the configuration you are trying to simulate ?
1.RANK single or multiple rank
2.Slots single or multiple slotted
Two type of termination is possible during write
RTT nom and RTT write
When you are using Dual slotted DIMM connected to a controller
During Idle condition of DRAM a value less than <40 will be selected
During Write to DRAM a value greater than 60 to 120 will be selected
The specific values are selected based on simulation this will be useful when you use multiple rank and multiple slotted system which is designed for higher bandwidth applications
(before doing batch i prefer to export a net to line sim and check the wave forms with mask for DDR3)