1 Reply Latest reply on Nov 20, 2013 4:48 AM by jduquette

    Create a decal with thermal via on PAD

    kaizukam

      Please tell me if this method is right way to create a decal with thermal via on PAD.

      My board has 6-MOSFET with similar package with SiR466DP, which is a kind of Power SOP8.

      I created decal out of ordinary sop8 adding bottom pad and 12 thermal via.

      This decal has 20 pins in stead of 8.  See decal.PNG below.

      decal.PNG

      Then create a parts of this by asigning such way that all via has pin number 8 as below.

      Parts_pin.png

      Now [Check Parts] generate no error and this parts placed on the board without error.

      Of course, layout completed and Gerber has been generated.

       

      Now I am wondering if this method is the right way to generate a decal with thermal via on PAD.

      Especially, what does it means to assign duplicated name in Parts Information for parts xxxxxxx.

        • 1. Re: Create a decal with thermal via on PAD
          jduquette

          That is one way to do it; now you know the proper number of vias are placed.  Others will want to leave the vias out and place them during layout and routing.  For instance if the vias at pins 15-17 had to be moved for a critical trace to route on an inner layer, then three other vias could be added at the 21-23 locations.

           

          I like your way, as you can always modify the decal locally if you need to delete unused pins (vias).  When you 'update from library' you'll have clearnace violations until you repeat the modification again, but that is what DRC is for.  Another plus for this technique is that you have better control over the solder paste definition so you aren't pasting the vias.

           

          There are pros and cons with every technique.