6 Replies Latest reply on Nov 20, 2013 4:41 AM by jduquette

    Numerous power supply


      Hello folks,


      Our engineers have a question.


      In a reference design they have multiple power supply attached to chips.

      They have named the power supply with a the name of the used voltage and the name of the funcional bolock.

      Example could be VCC_3.3V_Fiber or SMI_3.3V or plain 3.3V

      Now in the power supply generation all this different power supplys are tighed together like the example picture attached.


      In Expedition and DxD has no concept of starpoint and net connects (except for the unfortunate pipe that binds a maximum of two nets together)


      The only official solution is to rename the power supply all to the same name e.g. 3.3V. This is in DxD easy.


      But once done if the same schematic is used in another design and using unformal design reuse, you copy this part of the schematic to the new schematic. Then when you need to rename the power supply of this part of the logic, you hardly can select just the net names (e.g. 3.3V), becasue the names of the power supply you want to rename are the same with other power supply in the schematic, in this example evrything is 3.3V. So you have to tediously go from one net to the other, disconnect them, rename, and reconnect them. If you would have had the previous net names of SMI_3.3V, you could have renamed then to e.g. SMI_2.8V, and in the power supply section attached the new net name to a new source.


      Is there any solution to this case?

      Is there any way to put net names in a schematic together with one main net name, but keep them separate for handling and renaming?


      In layout you would want some of the power supply net segment to have different trace widths.


      In EE PCB there are no start points that are linked together with the net names indicated above. If you have only a smal set of power distribution trees, you could use minimal trace widths and normal trace widths. But this usage fails if you need more trees.


      Does anyone know a good workaround for this situation?


      I would really dream of having EE and DxD work so together that star point are inserted in the schematic. Every branch of the star point would have its net name and its own constraints, that are availble in Layout.

        • 1. Re: Numerous power supply

          This maybe of help.


          What we have done to get starpoints in Dxd/EE is use our standard 0603 Resistor cell and modify it.

          We have removed the solderpaste and soldermask from the pads as these are not required as it is a board feature and nothing will be soldered to it.


          Then to get the connection between the pads we have used two conductive shapes, which overlap the pads and then overlap each other in the middle.

          Each conductive shape have the same netname (net-1, net-2) as the pad which it overlaps.


          Finally, just for reference, we have put a star in silkscreen graphics with this cell so that out production/service people know that it is not a missing component.


          We have used an 0603 size for this because it suits our pcb technology, but I would say that this would work for 0402 or 0201 size if you require a smaller footprint.



          Attached is a picture of our starpoint to show how it looks.

          • 2. Re: Numerous power supply

            Hi Greg,


            i have one questions or two. What says the DRC in PCBExpedition? This component must generate errors, or not?



            • 3. Re: Numerous power supply

              Hi, yes it does does report a DRC with the conductive shape to conductive shape, however you can just accept this within the DRC report.


              This solution is only a workaround for the problem and not a complete fix, so we live with the DRC error.

              • 4. Re: Numerous power supply



                Many thanks for this idea of the "star-component".

                There was a discussion some time ago to make the component with overlapping pins. I never tried this route.

                And as I recall from an older previous discussion, this is not a long term viable solution, as it generates DRC. You have pointed this out.

                If my memory is correct it also has problem with the generation of netlist for the PCB producer as well as it has problem generating ODB++ files.


                The difficulty is that the star-component can source only a given  ammount of current. So you have to be very carefull to have different  star-components for different currents.


                So for the moment this seem not to be a very good alternative.


                Thanks for refreshing my memory about this star-component.


                • 5. Re: Numerous power supply

                  Don't know about problems with ODB++ outputs as we don't use them, just send fabricator the gerber outputs which work fine.


                  Just thought my posts would be of help, not necessarily the definitive answer. Just a help to maybe provide a solution to a problem.

                  It works well for us, it could work for other people.

                  • 6. Re: Numerous power supply

                    I use the same technique as Greg, with a jumper component with a RefDes of "JU#".  As long as all my clearance errors are one instance per JU component I know my design has no clearance errors that are not 'by design'.

                    I keep a copy of the clearance report with my design revision so a future designer knows that these are expected.