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query regarding DDR3 Batch mode simulation

Question asked by adityanc on Feb 5, 2014
Latest reply on Feb 12, 2014 by cristian.filip

Hello

 

Please clarify the following queries:

 

1. Please clarify the term  Initial Delay Delta, [ps] in DDR3 Batch simulation.

2. For Address signals the simulation set-up margin is 16ps. How to interpret this value whether it is good or at the edge??

Regards  
Aditya.N.C

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