agxinmj

hyperlynx

Discussion created by agxinmj on May 23, 2014
Latest reply on May 23, 2014 by cathy_terwedow

hai,       

         I was new to hyperlynx I was able to simulate processor ddr batch simulation from the app note provided by hyperlynx

how to create timing model for fpga ,I was not able to find out the timming parameters provided in the app note from  the data sheet

Please help me

thanks and regards

AGXIN MJ

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