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Which DDR controller do you use?

Question asked by weston_beal on Dec 3, 2008
Latest reply on Mar 23, 2014 by ks.padmanabhan

 

While working with customers to verify DDR/2/3 designs we need to know the timing requirements of the controller. For the DRAM devices we can usually assume that the timing requirements follow the JEDEC specification, but the controller designers are left to optimize their designs and specifiy the timing requirements in their own way.  If you are designing DDR/2/3 buses, what controller to do use; FPGA, chipset, CPU, custom ASIC? We would like to provide readily available solutions to help the most customers most of the time, so your input is useful in directing customer support solutions.

 

 

 

 

 

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