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I laid out a board with DDR2 memory just before Christmas.
The board was very tight and it was dificult to maintain track lengths the memory was chips on the board and we were using Pads Layout/Router
Thanks for responding.
Did you do all of the routing to the onboard memory chips manually? I would imagine that in addition to the track length issues, you also had to deal with special T or H-Tree topologies, right?
Would you mind sharing some of the design issues that you felt were the most problematic? I am interested in knowing this because I want to make sure we are addressing specific needs as we move forward with our DDR2/3 design feature set.
Thanks again for your response!
Don't understand the terminology T or H-Tree topologies however i created the accordians by hand and used router to "Tune" the lengths.
While routing in other tracks I allowed nuge protected tracks and the lengths altered which meant going through and re-tuning them all again.
I didn't find Router ver helpful in this regard!
We are using the t-shape topology and the lenght matching while we design the DDR2 memory in our PCB's as manually.
You can see the design sample as layer by layer in the attached files. Second layer is the GND layer.
We wait your response about it.