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HYPERLYNX HIGH SPEED SERIAL LINK SIMULATION

Question asked by agxinmj on Oct 31, 2014

Hai,

       I simulated the pcie express line with tx and rx models

the receiver end of the pcie express line is connected to an ac coupling capacitor to suppress noise

i exported the pcie net and assigned correct probes and simulated

i observed that the model is having some vmean value without capacitor the results are found perfect

but when the capacitor is added at the receiver the signal is swinging from zero but without capacitor the swing is from negative to positive voltage

why is the reference shift happening in the output probe window while including capacitor

regards

AGXIN.J

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