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Parasitics capacitance of metal interconnections

Question asked by lpalocko on Nov 1, 2014
Latest reply on Nov 4, 2014 by samantha_lizak

Hi everyone,

 

I design some cells (SRAM cells and etc.) based on Generic Design Kit, but I was a little confused, that cells has poor operating frequency. I investigated this problem and when I find files which defines parasitic value, I was very surprised. Parasitic capacitance are extremely high.

 

For example:

 

Technology GDK

- Feature size 130 nm

Capacitance intrinsic plate Poly  Mask  0.2 * area()

Capacitance intrinsic plate M1  Mask  0.1 * area()

Capacitance intrinsic plate M2  Mask  0.06 * area()

 

File defines unit capacitance as pF.

 

In comparison with:

 

Technology SCN018 (TSMC 0.18u) ftp://ftp.mosis.com/pub/mosis/vendors/tsmc-018/t92y_mm_non_epi_thk_mtl-params.txt

 

- Feature size 180 nm

 

Capacitance Poly (Area) to substrate - 101 aF/um2

Capacitance M1 (Area) to substrate -  34 aF/um2

Capacitance M2 (Area) to substrate -  14 aF/um2

 

Resistances are the same in both technology.

 

Is not problem in unit capacitance? File defines unit capacitance as pF, it shouldn't be fF?

 

Thanks a lot!

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