Initially, I've made the schematic of the basic functional block in MOS level. Then its layout has been made and simulated properly. It passed all rule checks.
Using this block, the final circuit schematic and its layout have been made. Using the 'peek' option, the inner circuitry of the block has been incorporated into the layout. Then I've done the power routing. So, after the 'routing'(aroute / iroute whatever), 'add text on ports' and 'verification of layout', is there any step left? Is it the last possible step of the PYXIS Layout Editor or there's something else? How can I get the DIE PHOTOGRAPH from Pyxis? If possible, please tell me the procedure.