1 Reply Latest reply on Jan 8, 2009 1:43 PM by chris_balcom

    How do I keep Calibre LVS from getting confused between parallel paths?



      I have a circuit that has parallel paths that end up in floating nets.



      At a low level in the hiearchy, these blocks pass LVS, but as I get higher in the hierarchy, LVS starts swapping some of the wires and reporting mismatches.



      The end points of these nets are not texted and are floating, so I am confused as to why LVS does not arbitrarily resolve the wire names.



      The only solution I have found at this point is to "uniquify" one of the paths by inserting a metal resistor in both the layout and schematic.



      Is there a switch or setting I can use so the Calibre LVS will resolve these types of paths?









        • 1. Re: How do I keep Calibre LVS from getting confused between parallel paths?


          Hi Larry,



          If the paths have differently sized devices, and could be distinguished in that way, then experimenting with a larger value for LVS PROPERTY RESOLUTION MAXIMUM may help. I think the default is 32. If the parallel branches can't be distinguished from one another based on device size properties, then that statement won't help.



          Another approach that has helped in many situations is to make sure the ports/pins of the hcells are texted.



          Experimenting with different HCELLS may be another possibility. Along those same lines would be to experiment by toggling your use of -automatch. That is, you may experiment by avoiding -automatch if you're using it already, or trying -automatch if you haven't already. Sometimes all it takes is to change the picture in some way, to allow Calibre to see things from a different perspective and then be able to work past a problem area.



          If you don't find something that works, and if we don't get suggestions from other users, this may be a good candidate for opening an SR through Mentor SupportNet.



          Let us know how it goes.