For a 4L board, assuming L2 is GND and positve, L4 is VCC and positive also. When you edit some thermal ties on L2 and output the gerber files, you should see those edited ties be in the L4.
Duringt the migration from Allegro to Expedtionpcb, I found lot of bugs and weaknesses of Expedtitionpcb, I told those to Mentor AE/CSE/TME, but it seems no Mentor AE/CES/TME really understand what the problems be.
We found, fixed and validated this fix last year as part of the 2007.5 release. We are currently trying to understand the impact of providing this fix in 2007.3 as an update.
ExpeditionPCB/XtremePCB Product Marketing Manager
I was reported this severe bug months ago. It was in any updates of 2007.2/2007.3, even may be in 2007.1. It happened on postive plane where it is possible to edit thermal ties.
There is a workaround here: If you use positve planes and wish to edit thermal ties, please never use the route border as the default plane shape! You should draw every shapes and this bug can be eliminated.
BTW, The only reason that we use positve plane is Valor 7.6R3 often failed when it try to extract the netlist from the ODGG outuputed from Expeditionpcb.
I hope my observation is helpful to other 2007.2/.3 users.
If the bug occured, and you have drawed planes shapes, please deleted all gerber files and any imported gerber data befor re-generate gerber files. Sometime, it can't be corrected if you fortgot to delete all previous output and imported data!