karen_chow

New paper: Variability Aware Modeling and Characterization in Standard Cell in 45 nm CMOS with Stress Enhancement Technique

Discussion created by karen_chow on Jan 15, 2009

 

Hi everyone. There's a new paper that's available from mentor.com called:

Variability Aware Modeling and Characterization in Standard Cell in 45 nm CMOS with Stress Enhancement Technique

 

 

 

 

 

Abstract:

 

 

Gate density is ultimately increased to 2100 kGates/mm2 by pushing the

critical design rules without increasing the circuit margin in 45 nm

technology. Layout dependences for stress enhanced MOSFET including

contact positioning, 2nd neighboring poly effect, and bent diffusion

are accurately modeled for the first time. With the constructed design

flow, gate length change of 2.8% to +3.6% and Idsat change of 10% to

+14% are removed from uncertain margin in 45 nm corner libraries.

 

 

 

 

 

To download this paper, go to:

 

 

http://www.mentor.com/products/ic_nanometer_design/techpubs/requestpubs?selected=43229

 

 

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