You can create the ENTRY_PORT property in VeSys Components just as you'd create any other property.
In VeSys Components, using the Property Codes dialog, you'd first create a property ENTRY_PORT. Then, with the Properties for Type Code dialog, you'd assign that ENTRY_PORT property to the Type Code for the component you are working with, say CONN, or CONM, or CONF, or SPL (connector and splice type codes). The property can now only be assigned to those objects belonging to the Type Code you assigned them to. Edit the connector or splice component, and in the Properties tab, add the property you just created, and give it a value of the csys name (no spaces) that you intend to be the the entry port in the Creo part.
Once you've done this for all your components, in VeSys Design, after you've done File > Refresh > Library Parts, do Actions > Update > Batch Update Library Parts. This will bring the newly added property-value pair into the individual instances where you've assigned part numbers. Look in the Properties tab of one of the instances, and you'll see the prop-value.
Bridge out the nwf file. You'll see that each pin is assigned the same single entry port. We strongly recommend that you use this approach to route multiple wires to a single csys because the Creo plugin does not support wires routed to individual cavities (csys').
INTERNAL_LEN is hardcoded to 0, because the extra length you need is defined as add-ons in the Base tab of the component and will be used in VHarness when you calculate Wire lengths. GROUPING is always ROUND as we don't support RIBBON.
Thank you for the fast answer!
The problem with this solution is, that every pin will have the same ENTRY_PORT value. But for a connector with 10 pins we have to use 10 different ENTRY_PORT (csys`) names/values, in Creo, so it can route the wires to the proper cavity. So the model will have 10 csys` with different names/values, according to the pin number of the additional connector (for example on the picture below you can see the model of a 2pin molex 5557 connector in Creo, we defined the connectors pins as ENTRY_1 and ENTRY_2).
If I manually overwrite the .nwf file (PIN1 ENTRY_PORT ENTRY_1 and same for PIN2 with ENTRY_2), Creo will route the wires to the correct cavities automatically. This is important, because we want to use Creo cabling to make harness designs, from the 3D cabling, using the flatten ability, and the table information will be generated from these connections (I assume, we didn't try it yet, we're trying to make the VeSys -> Creo Flow work correctly first).
Is there a possible way to give each pin a different ENTRY_PORT property value?
Unfortunately, no; not in the exact way you want it. However, if you are willing to do something slightly differently, then it is possible.
When you assign the ENTRY_PORT to a connector part number, don't give it any value. When you do the Refresh and Update in VDesign, in the connector's Properties tab, you will have ENTRY_PORT with no value.
When you export the nwf, each pin will be given an entry port value equal to the pin name. This means that you will need to update the csys' in your connector.prt to the pin names of the part number you defined in VComponents.
As indicated earlier, if you use this approach, and you use the Creo plugin to export an xml for use in VHarness, the connectors will not be hooked up to the bundle ends. This is because the network is not connected to a single csys in CREO, because your intention is to route individual wires to individual csys' in CREO. Also, any PARAMETERs you want to see in your CREO harness will need to be present in the Properties tab of the objects (wires, multicores, splices, and connectors). And as you are aware, the nwf format does not support nested levels in a multicore.
It could be that the connector part is already assigned to connectors in your VDesign (although I am not sure why that should matter; it ought to be possible to change the value). Can you please unassign the the part number from all instances, do a Save of the design, restart VComponents and try again?
If this doesn't work, try deleting the property. Then do a Refresh and Update in VDesign. You can now clear the value in the Properties tab of the instance.
For other parts, because you are not interested in routing wires to one csys, you need not create an explicit property at the part level. In VDesign, simply select all of the connectors, splices, right-click, Properties, and in the tab manually create ENTRY_PORT and leave it blank.
I've tried to unassign the connectors from the component, but it didn't worked. Then I made a totally new component, which is not assigned to anything in any way, but it didn't work that way either.
But the second solution you've described works, and it's still faster than defining each pin. I will try it in the 3D cabling, and if it works this way, I will mark your answer correct.
Please file an SR for your first para. Something is not right there.